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PDF L9935 Data sheet ( Hoja de datos )
| Número de pieza | L9935 | |
| Descripción | TWO-PHASE STEPPER MOTOR DRIVER | |
| Fabricantes | STMicroelectronics | |
| Logotipo |  |
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® L9935
TWO-PHASE STEPPER MOTOR DRIVER
2 X 1.1A FULL BRIDGE OUTPUTS
INTEGRATED CHOPPING CURRENT REGU-
LATION
MINIMIZED POWER DISSIPATION DURING
FLYBACK
OUTPUT STAGES WITH CONTROLLED
OUTPUT VOLTAGE SLOPES TO REDUCE
ELECTROMAGNETIC RADIATION
SHORT-CIRCUIT PROTECTION OF ALL
OUTPUTS
ERROR-FLAG FOR OVERLOAD, OPEN LOAD
AND OVERTEMPERATURE PREALARM
DELAYED CHANNEL SWITCH-ON TO RE-
DUCE PEAK CURRENTS
MAX. OPERATING SUPPLY VOLTAGE 24V
STANDBY CONSUMPTION TYPICALLY 40µA
SERIAL INTERFACE (SPI)
BLOCK DIAGRAM
PowerSO20
ORDERING NUMBER: L9935
DESCRIPTION
The L9935 is a two-phase stepper motor driver
circuit suited to drive bipolar stepper motors. The
device can be controlled by a serial interface
(SPI). All protections required to design a well
protected system (short-circuit, overtemperature,
cross conduction etc.) are integrated.
1
GND
~
20
GND
19
SRA
2
OUTA1
3
SCK
SDI
SDO
VCC
CSN
EN
4
5
6
7
8
DRIVER
LOGIC
COMMON
LOGIC
OSCILLATOR
DIAGNOSTIC
BIASING
18
OUTA2
17 N.C.
16
VS
15
OSC
14
CDRV
9
OUTB1
10
GND
November 1999
DRIVER
LOGIC
~
13
OUTB2
12
SRB
11
GND
D99AT415
1/19
1 page  
Figure 1. General Application Circuit Proposal.
L9935
GND 1
OUTA1 2
SDI
INTERFACE
µC
SCK 3
SDI 4
SDO 5
CSN 7
EN 8
+5V VCC 6
100nF
OUTB1 9
GND 10
~
DRIVER
LOGIC
COMMON
LOGIC
OSCILLATOR
DIAGNOSTIC
BIASING
DRIVER
LOGIC
~
20 GND
19 SRA
R1 0.33Ω
18 OUTA2
17 N.C.
16
VS
15 OSC
COSC
1nF
CDriver
14 100nF
CDRV
C1
100nF
STEPPER
MOTOR
POWER
SUPPLY
C2
10µF
13 OUTB2
12 SRB
R2 0.33Ω
11 GND
D99AT417
Application hints:
C1 and C2 should be placed as close to the de-
vice as possible. Low ESR of C2 is advanta-
geous. Peak currents through C1 and C2 may
reach 2A. Care should be taken that the reso-
nance of C1, C2 together with supply wire induc-
tances is not the chopping frequency or a multiple
of it.
FUNCTIONAL DESCRIPTION
Basic structure
The L9935 is a dual full bridge driver for inductive
Table 1.
loads with a chopper current regulation.
Outputs A1 and A2 belong to full bridge A
Outputs B1 and B2 belong to full bridge B
The polarity of the bridges can be controlled by
bit0 and bit3 (for full bridge A, bit3, for full bridge
B, bit0). Bit5, bit4 (for full bridge A) and bit2, bit1
(for full bridge B) control the currents. Bit3 high
leads to output A1 high. Bit0 high leads to output
B1 high.
Current setting Table 1 using a 0.33W sense re-
sistor.
bit5, bit2
H
H
L
L
bit4, bit1
H
L
H
L
IQX (Typ.)
0
60mA
550mA
900mA
IRX/max
0%
61%
100%
Remark
inernally sensed
5/19
5 Page 
L9935
Using 75mA chopping immediatelly after stand by:
The high resistive motor can be forced to chopping operation in the low current range. This leads to the
samebehaviour as using a low resistive motor.
Short to VS detection using high resistive motors:
The short to VS flag is overwritten each time the chopper comparator responds. Having detected a short
this flagonly can be reset by reaching chopping operation or resetting the circuit (ENN=1). For a high re-
sistive motor thisleads to the following consequence: Once a short to VS is detected the error flag will
persist even if the short is removed again until either a reset (ENN=1) or chopping (for example in 75mA
mode) has taken place. We suggest to return to operation once a short to VS was detected by using the
low current mode to reset the flag.
Limitation of the Diagnosis
The diagnosis depends on either detecting an overcurrent of more than typically 1.8A through the
source transistor or on not detecting a flyback pulse, or on detecting severe overcurrents of the sink
transistor immediately after turn on.
Small currents bypassing the load will not be detected.
In the low current range (hold current) the flyback pulse (especially commutating against the supply
voltage after changing phase) may (depending on the inductivity of the stepper motor windings) be
too short to be detected correctly. For this reason diagnosis using the flyback pulse is blanked at
phase reversal at hold current.
In the low current range (hold current) the current capability of the bridge is reduced on purpose.
Short to VS may not be detected. In stead the bridge may just chop like normal operation.
Flyback pulse detection is not blanked during PWM regulation at hold current (here commutation
voltage is less than 1V thus providing a longer pulse duration.) This however should be taken in ac-
count using stepper motors with low inductivity (less than 0.5mH). Using motors with such a low in-
ductivity the flyback voltage in hold mode may decay too fast.
Motors with extremely low ohmic resistance tend to pump up the current because current decay dur-
ing flyback approaches zero while at bridge turn on the current will increase. This may lead to over-
current detection. We suggest to use stepper motors with an ohmic resistance of approximately 3Ω or
more.
Partial shorts of windings or shorts of stepper motors with coils in series may still yield a flyback pulses
that are accepted by the diagnosis as a proper signal.
Table 2. Error table.
Error 1
bit7
H
L
H
L
Error 2
bit6
H
H
L
L
Description
Normal operation
Short to VS (sink overload immediately after turn on)
shorted load (no flyback)
open load (no flyback)
short to gnd (source overload, missing flyback is masked)
overtemperature prealarm
At stepping rates faster than 1ms/data transfer error flags indicating a short should be used to initiate a
pause of at least 1ms to allow the power bridges to cool down again.
11/19
11 Page | ||
| Páginas | Total 19 Páginas | |
| PDF Descargar | [ Datasheet L9935.PDF ] | |
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