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PDF APL2562 Data sheet ( Hoja de datos )
| Número de pieza | APL2562 | |
| Descripción | PLL Module | |
| Fabricantes | ASB | |
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Features
· +3 dBm Output Level at 2562 MHz
· Channel Step Size : 1000 kHz
· 2nd Harmonic : < -25 dBc
· Spurious Level : < -70 dBc
· Lock Time : < 10 ms
· 19 mA Current Consumption
Description
The plerowTM PLL synthesizer module was
designed for use in wireless and wireline
systems in a wide range of frequency from
50 MHz to 6 GHz. ASB’s PLL provides
exceptionally low spurious and phase noise
performance with fast locking time and low
current consumption. All products are
available in a surface-mount type package.
Specifications
Parameter
Frequency Range
Output Power
Supply Voltage
Current Consumption
Channel Step Size
2nd Harmonics
Spurious Level
Lock Time
Reference Frequency
Reference Input Level
Phase Noise (C / N)
@ 10 kHz
@ 100 kHz
Output Impedance
Operating Temp. Range
Package Type & Size
Unit
MHz
dBm
V
mA
kHz
dBc
dBc
ms
MHz
dBm
dBc/Hz
dBc/Hz
Ω
°C
mm
Min.
2537
2
4.7
-5
Typical
2562
3
5.0
19
1000
-35
-78
3
10
0
Max.
2587
4
5.3
30
-25
-70
10
5
-103
-100
-97
-121 -118 -115
50
-40 25
85
SMT, 19.0W×19.0L×5.8H
1) Measurement conditions are as follows: T = 25°C, VCC = 5 V, Freq. = 2562 MHz, 50 ohm system.
Plerow APL2562
PLL Module
More Information
Website: www.asb.co.kr
E-mail: [email protected]
Tel: (82) 42-528-7220
Fax: (82) 42-528-7222
ASB, Inc., 4th Fl. Venture Town
Bldg, KT HRDC, 367-17
Goijeong-Dong, Seo-Gu,
Daejeon, 302-716, Korea
Outline Drawing
Top View
A
C
B
Side View
1/1
Bottom View
I
HG
D
E
F
Pin Configuration
1 CLOCK
2 DATA
3 ENABLE
4 OSC IN
9 VCC (VCO)
13 RF OUT
15 VCP (PLL)
16 LOCK DETECT
Others
Ground
Dimension (mm)
A 19.0
B 19.0
C 5.8
D 1.5
E 0.5
F 1.75
G 1.35
H 15.0
I 0.9
Tolerance: ± 0.2
www.asb.co.kr
March 2004
1 page | ||
| Páginas | Total 1 Páginas | |
| PDF Descargar | [ Datasheet APL2562.PDF ] | |
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