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PDF COP87L88EGN-XE Data sheet ( Hoja de datos )
| Número de pieza | COP87L88EGN-XE | |
| Descripción | 8-Bit Microcontroller with UART and Three Multi-Function Timers | |
| Fabricantes | National Semiconductor | |
| Logotipo |  |
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August 1996
COP688EG COP684EG COP888EG COP884EG
COP988EG COP984EG 8-Bit Microcontroller
with UART and Three Multi-Function Timers
General Description
The COP8TM feature family of microcontrollers use an 8-bit
single-chip core architecture fabricated with National Semi-
conductor’s M2CMOSTM process technology The
COP888EG COP884EG are members of this expandable
8-bit core processor family of microcontrollers (Continued)
Y Packages
28 SO or 28 DIP each with 24 I O pins
40 DIP with 36 I O pins
44 PQFP with 40 I O pins
44 PLCC with 40 I O pins
CPU Instruction Set Features
Key Features
Y Full duplex UART
Y Three 16-bit timers each with two 16-bit registers
supporting
Processor Independent PWM mode
External Event counter mode
Input Capture mode
Y Quiet design (low radiated emissions)
Y 8k bytes on-board ROM
Y 1 ms instruction cycle time
Y Fourteen multi-source vectored interrupts servicing
External Interrupt with selectable edge
Idle Timer T0
Three Timers (each with 2 Interrupts)
MICROWIRE PLUS
Multi-Input Wake-Up
Software Trap
UART (2)
Default VIS (default interrupt)
Y 256 bytes on-board RAM
Y Versatile and easy to use instruction set
Additional Peripheral Features
Y Idle Timer
Y Multi-Input Wake-Up (MIWU) with optional interrupts (8)
Y Two analog comparators
Y 8-bit Stack Pointer (SP) stack in RAM
Y Two 8-bit Register Indirect Data Memory Pointers
(B and X)
Fully Static CMOS
Y WATCHDOGTM and clock monitor logic
Y Two power saving modes HALT and IDLE
Y MICROWIRE PLUSTM serial I O
Y Low current drain (typically k1 mA)
I O Features
Y Memory mapped I O
DataSYhSeinegtl4e Usu.pcpolymoperation 2 5V to 6 0V
Y Temperature ranges 0 C to a70 C b40 C to a85 C
b55 C to a125 C
Y Software selectable I O options (TRI-STATE Output
Push-Pull Output Weak Pull-Up Input High Impedance Development Support
Input)
Y Emulation and OTP devices
Y Schmitt trigger inputs on ports G and L
Y Real time emulation and full program debug offered by
MetaLink Development System
Block Diagram
DataShee
FIGURE 1 Block Diagram
TRI-STATE is a registered trademark of National Semiconductor Corporation
MICROWIRE PLUSTM M2CMOSTM COPSTM microcontrollers MICROWIRETM and WATCHDOGTM are trademarks of National Semiconductor Corporation
IBM PC PC-AT and PC-XT are registered trademarks of International Business Machines Corporation
iceMASTERTM is a trademark of MetaLink Corporation
C1996 National Semiconductor Corporation TL DD11214
RRD-B30M106 Printed in U S A
TL DD 11214 – 1
http www national com
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DC Electrical Characteristics 98XEG 0 C s TA s a70 C unless otherwise specified (Continued)
Parameter
Conditions
Min Typ Max Units
Allowable Sink Source
Current per Pin
D Outputs (Sink)
All others
15 mA
3 mA
Maximum Input Current
without Latchup (Note 5)
TA e 25 C
g100
mA
RAM Retention Voltage Vr
500 ns Rise
and Fall Time (Min)
2
V
Input Capacitance
7 pF
Load Capacitance on D2
1000
pF
AC Electrical Characteristics 98XEG 0 C s TA s a70 C unless otherwise specified
Parameter
Conditions
Min Typ Max Units
Instruction Cycle Time (tc)
Crystal Resonator
R C Oscillator
Inputs
tSETUP
tHOLD
Output Propagation Delay (Note 6)
tPD1 tPD0
SO SK
All Others
MICROWIRETM Setup Time (tUWS)
MICROWIRE Hold Time (tUWH)
MICROWIRE Output Propagation Delay (tUPD)
Input Pulse Width
Interrupt Input High Time
Interrupt Input Low Time
Timer Input High Time
Timer Input Low Time
Reset Pulse Width
4V s VCC s 6V
2 5V s VCC k 4V
4V s VCC s 6V
2 5V s VCC k 4V
4V s VCC s 6V
2 5V s VCC k 4V
4V s VCC s 6V
2 5V s VCC k 4V
RL e 2 2k CL e 100 pF
4V s VCC s 6V
D42Va5VstasVSCVhCCeCsek6tV44VU.com
2 5V s VCC k 4V
1
25
3
75
200
500
60
150
20
56
1
1
1
1
1
DC ms
DC ms
DC ms
DC ms
ns
ns
ns
ns
07
1 75
1
25
220
ms
ms
ms
ms
ns
ns
ns
tc
tc
tc
tc
ms
Note 5 Pins G6 and RESET are designed with a high voltage input network for factory testing These pins allow input voltages greater than VCC and the pins will
have sink current to VCC when biased at voltages greater than VCC (the pins do not have source current when biased at a voltage below VCC) The effective
resistance to VCC is 750X (typical) These two pins will not latch up The voltage at the pins must be limited to less than 14V
Note 6 The output propagation delay is referenced to the end of the instruction cycle where the output change occurs
DataShee
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Typical Performance Characteristics (b40 C s TA s a85 C)
Halt IDD
Idle IDD (Crystal Clock Option)
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Dynamic IDD vs VCC
(Crystal Clock Option)
TL DD 11214 – 7
TL DD 11214 – 8
Port L C G Weak Pull-Up
Source Current
TL DD 11214 – 9
Port L C G Push-Pull Source Current
DataSheet4U.com
TL DD 11214 – 10
Port L C G Push-Pull Sink Current
DataShee
Port D Source Current
TL DD 11214 – 11
Port D Sink Current
TL DD 11214 – 12
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TL DD 11214 – 13
11
TL DD 11214 – 14
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| Páginas | Total 48 Páginas | |
| PDF Descargar | [ Datasheet COP87L88EGN-XE.PDF ] | |
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