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PDF MSK4323 Data sheet ( Hoja de datos )

Número de pieza MSK4323
Descripción SMART HIGH TEMP 3-PHASE MOTOR DRIVE HYBRID
Fabricantes MSK 
Logotipo MSK Logotipo



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No Preview Available ! MSK4323 Hoja de datos, Descripción, Manual

MIL-PRF-38534 & 38535 CERTIFIED FACILITY
20 AMP, 100 VOLT MOSFET
SMART HIGH TEMP 3-PHASE
MM..SS..KKEENNNNEDEYDYCOCROPR. P.
MOTOR DRIVE HYBRID
4707 Dey Road Liverpool, N.Y. 13088
4323
(315) 701-6751
FEATURES:
Designed for High Temp Applications
100V, 20 Amp Capability
Low Thermal Resistance - Junction to Case - 3.0°C/W (Each MOSFET)
Self-Contained, Smart Lowside/Highside Drive Circuitry
Under-Voltage Lockout, Internal 2μS Deadtime
Capable of Switching Frequencies to 25KHz
Isolated Case Allows Direct Heat Sinking
Case Bolt-down Design Allows Superior Heat Dissipation
Contact MSK for MIL-PRF-38534 Qualification Status
DESCRIPTION:
The MSK 4323 is a 20 Amp, High Temp Smart 3 Phase Bridge with a 100 volt rating on the output switches. The
output switches are power MOSFETs with intrinsic fast-recovery diodes for the free-wheeling currents of motor
drives. This high temp smart power motor drive module is compatible with 5V CMOS or TTL logic levels. The internal
circuitry prevents simultaneous turn-on of the in-line half bridge transistors with a built-in 2μS deadtime to prevent
shoot-through. Undervoltage lockout shuts down the bridge when the supply voltage gets to a point of incomplete
turn-on of the output switches. The internal high-side boot strap power supply derived from the +15 volt supply
completely eliminates the need for 3 floating independent power supplies for the high-side drive. The circuit has been
tested to temperatures above 175°C and uses special high temperature construction processes.
EQUIVALENT SCHEMATIC
TYPICAL APPLICATIONS
3 PHASE SIX STEP DC BRUSHLESS MOTOR DRIVE
OR 3 PHASE SINUSOIDAL INDUCTION MOTOR DRIVE
1
PIN-OUT INFORMATION
1 VCC
2 AØHIN
3 BØHIN
4 CØHIN
5 AØLIN
6 FAULT
7 CØLIN
8 BØLIN
9 VSS
10 ITRIP
20 VBAØ
19 AØ
18 V+
17 VBBØ
16 N/C
15 BØ
14 VBCØ
13 N/C
12 CØ
11 ISENSE
8548-66 Rev. E 7/13

1 page




MSK4323 pdf
TYPICAL SYSTEM OPERATION
FIGURE 2
The MSK 4323 is designed to be used with a high voltage bus, +15 volt low power bus and +5 volt logic signals.
Proper derating should be applied when designing the MSK 4323 into a system. High frequency layout techniques
with ground planes on a printed circuit board is the only method that should be used for circuit construction. This will
prevent pulse jitter caused by excessive noise pickup on the current sense signal or the error amp signal.
Ground planes for the low power circuitry and high power circuitry should be kept separate. The connection
between the bottom of the current sense resistor, VSS pin and the high power ground are connected at this point.
This is a critical path and high currents should not be flowing between the current sense and VSS. Inductance in this
path should be kept to a minimum. An RC filter (shown in 2 places) will filter out the current spikes and keep the
detected noise for those circuits down to a minimum.
In the system shown, two types of current limit are implemented. The first limit is a PWM pulse by pulse limit
controlled by the motor controller. A second absolute maximum limit is set up for the MSK 4323 which will com-
pletely shut off the bridge in the event that current limit is exceeded.
When controlling the motor speed by the PWM method, it is required that the low side switches be PWM pulsed
due to the bootstrap power supplies used to power the high side switch drives. The higher the PWM speed the higher
the current load on the drive supply. PWM of the low side will prevent sagging of the high side bootstrap supplies.
The logic signals coming from the typical motor controller IC are set up for driving N channel low side and P channel
high side switches directly and are usually 15 volt levels. Provision should be made for getting 5 volt logic signals to
the MSK 4323 of the correct assertion levels. Typically, the low side signals out of the controller are high active and
the high side are low active. Inverters are shown in the system schematic for the low side controller output.
5 8548-66 Rev. E 7/13

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