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PDF STS7P4LLF6 Data sheet ( Hoja de datos )

Número de pieza STS7P4LLF6
Descripción P-channel Power MOSFET
Fabricantes STMicroelectronics 
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STS7P4LLF6
P-channel 40 V, 0.0175 Ω typ.,7 A, STripFET™ F6
Power MOSFET in an SO-8 package
Datasheet - production data
Figure 1: Internal schematic diagram
Features
Order code
STS7P4LLF6
VDS
40 V
RDS(on) max.
0.0205 Ω
ID
7A
Very low on-resistance
Very low gate charge
High avalanche ruggedness
Low gate drive power loss
Applications
Switching applications
Description
This device is a P-channel Power MOSFET
developed using the STripFET™ F6 technology,
with a new trench gate structure. The resulting
Power MOSFET exhibits very low RDS(on) in all
packages.
For the P-channel Power MOSFET, current
polarity of voltages and current have to be
reversed.
Order code
STS7P4LLF6
Table 1: Device summary
Marking
Package
7K4L
SO-8
Packaging
Tape and reel
March 2015
DocID025619 Rev 2
This is information on a product in full production.
1/13
www.st.com

1 page




STS7P4LLF6 pdf
STS7P4LLF6
Symbol Parameter
VSD (1)
Forward on
voltage
trr
Reverse
recovery time
Reverse
Qrr recovery
charge
Reverse
IRRM recovery
current
Table 7: Source drain diode
Test conditions
VGS = 0 V, ISD = 3.5 A
Electrical characteristics
Min. Typ. Max. Unit
- 1.1 V
- 26
ISD = 3.5 A, di/dt = 100 A/µs, VDD = 32 V,
Tj = 150 °C (see Figure 15: "Test circuit for
inductive load switching and diode recovery
times")
-
21
- 1.7
ns
nC
A
Notes:
(1)Pulse test: pulse duration = 300 µs, duty cycle 1.5%
For the P-channel Power MOSFET, current polarity of voltages and current have
to be reversed.
DocID025619 Rev 2
5/13

5 Page





STS7P4LLF6 arduino
STS7P4LLF6
4.2 Packing information
Figure 18: SO-8 tape and reel dimensions
Package information
Dim.
A
C
D
N
T
Ao
Bo
Ko
Po
P
Table 9: SO-8 tape and reel mechanical data
mm
Min. Typ.
12.8
20.2
60
-
8.1
5.5
2.1
3.9
7.9
Max.
330
13.2
22.4
8.5
5.9
2.3
4.1
8.1
DocID025619 Rev 2
11/13

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