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Número de pieza | STL4N80K5 | |
Descripción | N-CHANNEL POWER MOSFET | |
Fabricantes | STMicroelectronics | |
Logotipo | ||
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No Preview Available ! STL4N80K5
N-channel 800 V, 2.1 Ω typ., 2.5 A MDMesh™ K5
Power MOSFET in a PowerFLAT™ 5x6 VHV package
Datasheet − production data
1
2
3
4
PowerFLAT™ 5x6 VHV
Features
Order code
STL4N80K5
VDS
800 V
RDS(on)max.
2.5 Ω
• Industry’s lowest RDS(on) x area
• Industry’s best figure of merit (FoM)
• Ultra low gate charge
• 100% avalanche tested
• Zener protected
ID
2.5 A
Figure 1. Internal schematic diagram
D(5, 6, 7, 8)
8 76 5
G(4)
S(1, 2, 3)
12 34
Top View
AM15540v1
Applications
• Switching applications
Description
This very high voltage N-channel Power MOSFET
is designed using MDmesh™ K5 technology
based on an innovative proprietary vertical
structure. The result is a dramatic reduction in on-
resistance and ultra-low gate charge for
applications requiring superior power density and
high efficiency.
Order code
STL4N80K5
Table 1. Device summary
Marking
Package
4N80K5
PowerFLAT™ 5x6 VHV
Packaging
Tape and reel
May 2015
This is information on a product in full production.
DocID025574 Rev 2
1/17
www.st.com
1 page STL4N80K5
Electrical characteristics
Symbol
Parameter
td(on)
tr
td(off)
tf
Turn-on delay time
Rise time
Turn-off delay time
Fall time
Table 6. Switching times
Test conditions
VDD = 400 V, ID = 1.5 A,
RG = 4.7 Ω, VGS = 10 V
(see Figure 15),
(see Figure 20)
Min. Typ. Max Unit
- 16.5 - ns
- 15 - ns
- 36 - ns
- 21 - ns
Table 7. Source drain diode
Symbol
Parameter
Test conditions
Min. Typ. Max. Unit
ISD Source-drain current
- 2.5 A
ISDM
VSD(1)
Source-drain current (pulsed)
Forward on voltage
ISD = 3 A, VGS = 0
- 10 A
- 1.5 V
trr
Qrr
IRRM
Reverse recovery time
Reverse recovery charge
Reverse recovery current
ISD = 3 A, di/dt = 100 A/µs
VDD = 60 V (see Figure 17)
- 242
- 1.42
- 12
ns
µC
A
trr
Qrr
IRRM
Reverse recovery time
Reverse recovery charge
Reverse recovery current
ISD = 3 A, di/dt = 100 A/µs
VDD = 60 V, Tj = 150 °C
(see Figure 17)
- 373
- 1.98
- 10.5
ns
µC
A
1. Pulsed: pulse duration = 300 µs, duty cycle 1.5%
Table 8. Gate-source Zener diode
Symbol
Parameter
Test conditions
Min Typ. Max Unit
V(BR)GSO Gate-source breakdown voltage IGS= ± 1mA, ID=0
30 - - V
The built-in back-to-back Zener diodes have been specifically designed to enhance the ESD
capability of the device. The Zener voltage is appropriate for efficient and cost-effective
intervention to protect the device integrity. These integrated Zener diodes thus eliminate the
need for external components.
DocID025574 Rev 2
5/17
17
5 Page STL4N80K5
Package mechanical data
Figure 21. PowerFLAT™ 5x6 VHV
12
3
4
Bottom view
Pin 1
identification
8 76 5
8 76 5
Side view
Pin 1
1 2 34
identification
DocID025574 Rev 2
Top view
8368144_REV_B
11/17
17
11 Page |
Páginas | Total 17 Páginas | |
PDF Descargar | [ Datasheet STL4N80K5.PDF ] |
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