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PDF LTC3859A Data sheet ( Hoja de datos )
| Número de pieza | LTC3859A | |
| Descripción | Buck/Buck/Boost Synchronous Controller | |
| Fabricantes | Linear Technology | |
| Logotipo |  |
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LTC3859A
Low IQ, Triple Output,
Buck/Buck/Boost Synchronous Controller
with Improved Burst Mode Operation
Features
Description
n Dual Buck Plus Single Boost Synchronous Controllers
n Outputs Remain in Regulation Through Cold Crank
Down to 2.5V
n Low Operating IQ: 55μA (One Channel On)
n Wide Bias Input Voltage Range: 4.5V to 38V
n Buck Output Voltage Range: 0.8V ≤ VOUT ≤ 24V
n Boost Output Voltage Up to 60V
n RSENSE or DCR Current Sensing
n 100% Duty Cycle for Boost Synchronous MOSFET
Even in Burst Mode® Operation
n Phase-Lockable Frequency (75kHz to 850kHz)
n Programmable Fixed Frequency (50kHz to 900kHz)
n Selectable Continuous, Pulse-Skipping or Low Ripple
Burst Mode Operation at Light Loads
n Very Low Buck Dropout Operation: 99% Duty Cycle
n Adjustable Output Voltage Soft-Start or Tracking
n Low Shutdown IQ: 14μA
n Small 38-Pin 5mm × 7mm QFN and TSSOP Packages
Applications
n Automotive Always-On and Start-Stop Systems
n Battery Operated Digital Devices
n Distributed DC Power Systems
n Multioutput Buck-Boost Applications
The LTC®3859A is a high performance triple output (buck/
buck/boost) synchronous DC/DC switching regulator
controller that drives all N-channel power MOSFET stages.
Constant frequency current mode architecture allows
a phase-lockable switching frequency of up to 850kHz.
The LTC3859A operates from a wide 4.5V to 38V input
supply range. When biased from the output of the boost
converter or another auxiliary supply, the LTC3859A can
operate from an input supply as low as 2.5V after start-up.
The 55μA no-load quiescent current extends operating
runtime in battery powered systems. OPTI-LOOP com-
pensation allows the transient response to be optimized
over a wide range of output capacitance and ESR values.
The LTC3859A features a precision 0.8V reference for the
bucks, 1.2V reference for the boost and a power good
output indicator. The PLLIN/MODE pin selects among
Burst Mode operation, pulse-skipping mode, or continu-
ous inductor current mode at light loads.
Compared to the LTC3859, the LTC3859A's boost controller
has improved performance in Burst Mode operation when
the input voltage is higher than the regulated output voltage.
L, LT, LTC, LTM, Burst Mode, OPTI-LOOP and µModule are registered trademarks and
No RSENSE is a trademark of Linear Technology Corporation. All other trademarks are the
property of their respective owners. Protected by U.S. Patents including 5481178, 5705919,
5929620, 6144194, 6177787, 6580258.
Typical Application
VOUT3
REGULATED AT 10V WHEN VIN < 10V
FOLLOWS VIN WHEN VIN > 10V
220µF
499k
1µF
VFB3
68.1k
VBIAS
TG1
VIN
2.5V TO 38V
(START-UP ABOVE 5V)
2mΩ 1.2µH
220µF
4.7µF
SW1, 2, 3
TG3 SW1
SW3 LTC3859A
BG1
BG3
SENSE3–
SENSE3+
INTVCC
BOOST1, 2, 3
0.1µF
ITH1, 2, 3
SENSE1+
SENSE1–
VFB1
RUN1, 2, 3
EXTVCC
TG2
SW2
BG2
VOUT1
4.9µH 6mΩ
68.1k 357k
6.5µH 8mΩ
0.1µF
SENSE2+
TRACK/SS1, 2
SENSE2–
SS3 VFB2
PGND SGND
3859 TA01a
68.1k 649k
VOUT1
5V
5A
220µF
VOUT2
8.5V
3A
68µF
Efficiency vs Input Voltage
100
95 VOUT2 = 8.5V
90 VOUT1 = 5V
85
80
75
70
65
60
55 FIGURE 12 CIRCUIT
50 ILOAD = 2A
0 5 10 15 20 25 30
INPUT VOLTAGE (V)
35 40
3859A TA01b
3859af
1
1 page  
LTC3859A
E lectrical Characteristics The l denotes the specifications which apply over the specified operating
junction temperature range, otherwise specifications are at TA = 25°C. VBIAS = 12V, VRUN1,2,3 = 5V, EXTVCC = 0V unless otherwise
noted. (Note 2)
SYMBOL
PARAMETER
Gate Driver
TG1,2
Pull-Up On-Resistance
Pull-Down On-Resistance
BG1,2
Pull-Up On-Resistance
Pull-Down On-Resistance
TG3 Pull-Up On-Resistance
Pull-Down On-Resistance
BG3 Pull-Up On-Resistance
Pull-Down On-Resistance
TG1,2,3 tr
TG1,2,3 tf
BG1,2,3
BG1,2,3
ttrf
TG/BG t1D
TG Transition Time:
Rise Time
Fall Time
BG Transition Time:
Rise Time
Fall Time
Top Gate Off to Bottom Gate On Delay
Synchronous Switch-On Delay Time
BG/TG t1D
Bottom Gate Off to Top Gate On Delay
Top Switch-On Delay Time
tON(MIN)1,2
Buck Minimum On-Time
tON(MIN)3
Boost Minimum On-Time
INTVCC Linear Regulator
VINTVCCVBIAS Internal VCC Voltage
VLDOVBIAS
INTVCC Load Regulation
VINTVCCEXT
Internal VCC Voltage
VLDOEXT
INTVCC Load Regulation
VEXTVCC
EXTVCC Switchover Voltage
VLDOHYS
EXTVCC Hysteresis
Oscillator and Phase-Locked Loop
f25k Programmable Frequency
f65k Programmable Frequency
f105k Programmable Frequency
fLOW Low Fixed Frequency
fHIGH High Fixed Frequency
fSYNC
Synchronizable Frequency
PGOOD1 Output
VPGL1
IPGOOD1
VPG1
PGOOD1 Voltage Low
PGOOD1 Leakage Current
PGOOD1 Trip Level
CONDITIONS
MIN TYP MAX UNITS
2.5 Ω
1.5 Ω
2.4 Ω
1.1 Ω
1.2 Ω
1.0 Ω
1.2 Ω
1.0 Ω
(Note 6)
CLOAD = 3300pF
CLOAD = 3300pF
25 ns
16 ns
(Note 6)
CCLLOOAADD
=
=
3300pF
3300pF
28 ns
13 ns
CLOAD = 3300pF Each Driver
Bucks (Channels 1, 2)
Boost (Channel 3)
30
70
ns
ns
CLOAD = 3300pF Each Driver
Bucks (Channels 1, 2)
Boost (Channel 3)
30
70
ns
ns
(Note 7)
95 ns
(Note 7)
120 ns
6V < VBIAS < 38V, VEXTVCC = 0V, IINTVCC = 0mA
ICC = 0mA to 50mA, VEXTVCC = 0V
6V < VEXTVCC < 13V, IINTVCC = 0mA
ICC = 0mA to 50mA, VEXTVCC = 8.5V
EXTVCC Ramping Positive
5.0 5.4 5.6
0.7 2
5.0 5.4 5.6
0.7 2
4.5 4.7
200
V
%
V
%
V
mV
RFREQ = 25k; PLLIN/MODE = DC Voltage
RFREQ = 65k; PLLIN/MODE = DC Voltage
RFREQ = 105k; PLLIN/MODE = DC Voltage
VFREQ = 0V PLLIN/MODE = DC Voltage
VFREQ = INTVCC; PLLIN/MODE = DC Voltage
PLLIN/MODE = External Clock
115
375 440 505
835
320 350 380
485 535 585
l 75
850
kHz
kHz
kHz
kHz
kHz
kHz
IPGOOD1 = 2mA
VPGOOD1 = 5V
VVFFBB11
with Respect to Set
Ramping Negative
Regulated
Voltage
Hysteresis
VFB1 Ramping Positive
Hysteresis
0.2 0.4
±1
–13 –10 –7
2.5
7 10 13
2.5
V
µA
%
%
%
%
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5 Page 
LTC3859A
Pin Functions (QFN/TSSOP)
FREQ (Pin 1/Pin 5): The Frequency Control Pin for the
Internal VCO. Connecting the pin to GND forces the VCO
to a fixed low frequency of 350kHz. Connecting the pin
to INTVCC forces the VCO to a fixed high frequency of
535kHz. Other frequencies between 50kHz and 900kHz
can be programmed using a resistor between FREQ and
GND. The resistor and an internal 20µA source current
create a voltage used by the internal oscillator to set the
frequency.
PLLIN/MODE (Pin 2/Pin 6): External Synchronization
Input to Phase Detector and Forced Continuous Mode
Input. When an external clock is applied to this pin, the
phase-locked loop will force the rising TG1 signal to be
synchronized with the rising edge of the external clock,
and the regulators operate in forced continuous mode.
When not synchronizing to an external clock, this input,
which acts on all three controllers, determines how the
LTC3859AA operates at light loads. Pulling this pin to
ground selects Burst Mode operation. An internal 100k
resistor to ground also invokes Burst Mode operation
when the pin is floated. Tying this pin to INTVCC forces
continuous inductor current operation. Tying this pin to
a voltage greater than 1.2V and less than INTVCC – 1.3V
selects pulse-skipping operation. This can be done by
connecting a 100k resistor from this pin to INTVCC.
SGND (Pin 8/Pin 12): Small Signal Ground common to
all three controllers, must be routed separately from high
current grounds to the common (–) terminals of the CIN
capacitors.
RUN1, RUN2, RUN3 (Pins 9, 10, 11/Pins 13, 14, 15):
Digital Run Control Inputs for Each Controller. Forcing
RUN1 below 1.17V and RUN2/RUN3 below 1.20V shuts
down that controller. Forcing all of these pins below 0.7V
shuts down the entire LTC3859A, reducing quiescent cur-
rent to approximately 14µA.
OV3 (Pin 17/Pin 21): Overvoltage Open-Drain Logic
Output for the Boost Regulator. OV3 is pulled to ground
when the voltage on the VFB3 pin is under 110% of its set
point, and becomes high impedance when VFB3 goes over
110% of its set point.
INTVCC (Pin 22/Pin 26): Output of the Internal Linear Low
Dropout Regulator. The driver and control circuits are pow-
ered from this voltage source. Must be decoupled to PGND
with a minimum of 4.7µF ceramic or tantalum capacitor.
EXTVCC (Pin 23/Pin 27): External Power Input to an
Internal LDO Connected to INTVCC. This LDO supplies
INTVCC power, bypassing the internal LDO powered from
VBIAS whenever EXTVCC is higher than 4.7V. See EXTVCC
Connection in the Applications Information section. Do
not float or exceed 14V on this pin.
VBIAS (Pin 24/Pin 28): Main Bias Input Supply Pin. A
bypass capacitor should be tied between this pin and the
SGND pin.
BG1, BG2, BG3 (Pins 29, 21, 25/Pins 33, 25, 29): High
Current Gate Drives for Bottom (Synchronous) N-Channel
MOSFETs. Voltage swing at these pins is from ground to
INTVCC.
BOOST1, BOOST2, BOOST3 (Pins 30, 20, 26/Pins 34,
24, 30): Bootstrapped Supplies to the Top Side Floating
Drivers. Capacitors are connected between the BOOST and
SW pins and Schottky diodes are tied between the BOOST
and INTVCC pins. Voltage swing at the BOOST pins is from
INTVCC to (VIN + INTVCC).
SW1, SW2, SW3 (Pins 31, 19, 28/Pins 35, 23, 32):
Switch Node Connections to Inductors.
TG1, TG2, TG3 (Pins 32, 18, 27/Pins 36, 22, 31): High
Current Gate Drives for Top N-Channel MOSFETs. These
are the outputs of floating drivers with a voltage swing
equal to INTVCC superimposed on the switch node volt-
age SW.
PGOOD1 (Pin 33/Pin 37): Open-Drain Logic Output.
PGOOD1 is pulled to ground when the voltage on the VFB1
pin is not within ±10% of its set point.
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11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet LTC3859A.PDF ] | |
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