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PDF NX5P2924 Data sheet ( Hoja de datos )
| Número de pieza | NX5P2924 | |
| Descripción | Logic controlled high-side power switch | |
| Fabricantes | NXP Semiconductors | |
| Logotipo |  |
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NX5P2924
Logic controlled high-side power switch
Rev. 1 — 24 February 2014
Product data sheet
1. General description
The NX5P2924 is a high-side load switch which features a low ON resistance N-channel
MOSFET with controlled slew rate that supports 2.5 A of continuous current. Designed for
operation from 0.8 V to 5.5 V, it is used in power domain isolation applications to reduce
power dissipation and extend battery life. The enable logic includes integrated logic level
translation making the device compatible with lower voltage processors and controllers.
The NX5P2924 is ideal for portable, battery operated applications due to low ground
current.
2. Features and benefits
Wide supply voltage range from 0.8 V to 5.5 V
Very low ON resistance:
14 m (typical) at a supply voltage of 1.2 V
14 m (typical) at a supply voltage of 1.8 V
High noise immunity
1.2 V control logic; Integrated EN pull-down resistor
High current handling capability (2.5 A continuous current)
Turn-on slew rate limiting
ESD protection:
HBM JESD22-A114F Class 3A exceeds 4000 V
CDM AEC-Q100-011 revision B exceeds 1000 V
Specified from 40 C to +85 C
3. Applications
Cell phone
Digital cameras and audio devices
Portable and battery-powered equipment
1 page  
NXP Semiconductors
NX5P2924
Logic controlled high-side power switch
11. Thermal characteristics
Table 7.
Symbol
Rth(j-a)
Thermal characteristics
Parameter
thermal resistance from junction to ambient
Conditions
Typ
[1] 139
Unit
K/W
[1] Rth(j-a) is dependent upon board layout. To minimize Rth(j-a), ensure that all pins have a solid connection to larger copper layer areas. In
multi-layer PCBs, the second layer should be used to create a large heat spreader area below the device. Avoid using solder-stop
varnish under the device.
12. Static characteristics
Table 8. Static characteristics
VI(VIN) = 1.0 V to 5.5 V, unless otherwise specified; Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
Tamb = 25 C Tamb = 40 C to +85 C
Min Typ[1] Max
Min
Max
VIH
VIL
Rdch
I(VIN)
HIGH-level input
voltage
LOW-level input
voltage
discharge
resistance
supply current
EN input; VI(VIN) = 0.8 V
EN input; VI(VIN) = 1.0 V to 1.2 V
EN input; VI(VIN) = 1.2 V to 2.5 V
EN input; VI(VIN) = 2.5 V to 5.5 V
EN input; VI(VIN) = 0.8 V
EN input; VI(VIN) = 1.0 V to 1.2 V
EN input; VI(VIN) = 1.2 V to 2.5 V
EN input; VI(VIN) = 2.5 V to 5.5 V
VOUT output; VI(VIN) = 0.8 V
VOUT output; VI(VIN) = 1.0 V
VOUT output; VI(VIN) = 1.2 V
VOUT output; VI(VIN) = 1.8 V
VOUT output; VI(VIN) = 3.3 V
VOUT output; VI(VIN) = 5.5 V
VOUT open
EN = HIGH; VI(VIN) = 1.0 V;
see Figure 5 and Figure 6
- 0.7 -
0.9 -
-
1.2 -
-
1.2 -
-
- 0.25 -
- - 0.3
- - 0.4
- - 0.6
- 4.00 -
- 1.40 -
- 1.30 -
- 1.27 1.50
- 1.25 1.50
- 1.25 1.50
- 25 -
-
0.9
1.2
1.2
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
0.3
0.4
0.6
-
-
-
-
-
-
35
EN = HIGH; VI(VIN) = 1.8 V;
see Figure 5 and Figure 6
- 30 -
-
50
EN = HIGH; VI(VIN) = 3.6 V;
see Figure 5 and Figure 6
- 45 -
-
65
EN = HIGH; VI(VIN) = 5.5 V;
see Figure 5 and Figure 6
- 75 -
-
105
EN = LOW; VI(VIN) = 1.0 V;
see Figure 7 and Figure 8
- 0.1 -
-
0.8
EN = LOW; VI(VIN) = 1.8 V;
see Figure 7 and Figure 8
- 0.1 -
-
1.0
EN = LOW; VI(VIN) = 3.6 V;
see Figure 7 and Figure 8
- 0.1 -
-
1.2
EN = LOW; VI(VIN) = 5.5 V;
see Figure 7 and Figure 6
- 0.1 -
-
1.5
Unit
V
V
V
V
V
V
V
V
k
k
k
k
k
k
A
A
A
A
A
A
A
A
NX5P2924
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 24 February 2014
© NXP B.V. 2014. All rights reserved.
5 of 17
5 Page 
NXP Semiconductors
NX5P2924
Logic controlled high-side power switch
9287(1
9
DDD
,, 9,1
P$
9287(1
9
DDD
,, 9,1
P$
W XV
VI(VIN) = 1 V; RL = 10 ; CL = 0.1 F; Tamb = 25 C.
(1) VOUT
(2) EN
(3) II(VIN)
Fig 16. Typical enable time at VI(VIN) = 1 V; CL = 0.1 F
W XV
VI(VIN) = 3.6 V; RL = 10 ; CL = 0.1 F; Tamb = 25 C.
(1) VOUT
(2) EN
(3) II(VIN)
Fig 17. Typical enable time at VI(VIN) = 3.6 V;
CL = 0.1 F
9287(1
9
DDD
,, 9,1
P$
9287(1
9
DDD
W XV
VI(VIN) = 5.5 V; RL = 10 ; CL = 0.1 F; Tamb = 25 C.
(1) VOUT
(2) EN
(3) II(VIN)
Fig 18. Typical enable time at VI(VIN) = 5.5 V;
CL = 0.1 F
W XV
RL = 10 ; CL = 0.1 F; Tamb = 25 C
(1) VI(VIN) = 5.5 V
(2) VI(VIN) = 3.6 V
(3) VI(VIN) = 1.0 V
(4) EN
Fig 19. Typical disable time
NX5P2924
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 24 February 2014
© NXP B.V. 2014. All rights reserved.
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