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PDF NX5P1000 Data sheet ( Hoja de datos )
| Número de pieza | NX5P1000 | |
| Descripción | Logic controlled high-side power switch | |
| Fabricantes | NXP Semiconductors | |
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NX5P1000
Logic controlled high-side power switch
Rev. 2 — 14 January 2014
Product data sheet
1. General description
The NX5P1000 is an advanced power switch and ESD- protection device for USB OTG
applications. The device includes under voltage and over voltage lockout, over-current,
over-temperature, reverse bias and in-rush current protection circuits. These circuits are
designed to isolate a VBUS OTG voltage source automatically from a VBUS interface pin
when a fault condition occurs. The device features two power switch terminals, one input
(VINT) and one output (VBUS). It has a current limit input (ILIM) for defining the
over-current and in-rush current limit. A voltage detect output (VDET) is used to determine
when VINT is in the correct voltage range. An open-drain fault output (FAULT) indicates
when a fault condition has occurred and an enable input (EN) controls the state of the
switch. When EN is set LOW the device enters a low-power mode, disabling all protection
circuits except the undervoltage lockout. The low-power mode can be entered at anytime
unless the over temperature protection circuit has been triggered.
Designed for operation from 3 V to 5.5 V, it is used in power domain isolation applications
to protect from out of range operation. The enable input includes integrated logic level
translation making the device compatible with lower voltage processors and controllers.
2. Features and benefits
Wide supply voltage range from 3 V to 5.5 V
30 V tolerant on VBUS
ISW maximum 1 A continuous current
Very low ON resistance: 100 m (maximum) at a supply voltage of 4.0 V
Low-power mode (ground current 20 A typical)
1.8 V control logic
Soft start turn-on slew rate
Protection circuitry
Over-temperature protection
Over-current protection with low current output mode
Reverse bias current/Back drive protection
Overvoltage lockout
Undervoltage lockout
Analog voltage limited VBUS monitor path
ESD protection:
HBM ANSI/ESDA/JEDEC JS-001 Class 2 exceeds 2 kV
IEC61000-4-2 contact discharge exceeds 8 kV for pins VBUS, D, D+ and ID
Specified from 40 C to +85 C
1 page  
NXP Semiconductors
NX5P1000
Logic controlled high-side power switch
8.3 Overvoltage lockout
When EN is set HIGH, the overvoltage lockout (OVLO) circuit disables the N-channel
MOSFET. If VINT > 5.75 V, the FAULT output is set LOW. The OVLO circuit is disabled in
low-power mode and does not influence the FAULT output state. If the OVLO circuit is
active, setting the EN pin LOW returns the device to low-power mode.
8.4 ILIM
The over-current protection circuit's (OCP) trigger value Iocp, can be set using an external
resistor RILIM connected to the ILIM pin (see Figure 6). When EN is set HIGH and the ILIM
pin is grounded, the N-channel MOSFET is disabled. In addition, VBUS is supplied by the
10 mA current source and the FAULT output set LOW.
8.5 Over-current protection
If the current through the N-channel MOSFET exceeds Iocp for 20 s or VBUS < VINT
200 mV, the over-current protection (OCP) circuit disables the N-channel MOSFET within
2 s. It supplies VBUS from the 10 mA current source and indicates a fault condition by
setting the FAULT pin LOW. The OCP circuit is automatically reset when VINT > VBUS >
VINT 200 mV for 20 s. The N-channel MOSFET assumes the state defined by the EN
input, the 10 mA current source is disconnected and the FAULT pin is set high impedance.
If the OCP circuit is active, setting the EN pin LOW returns the device to low-power mode.
8.6 Over-temperature protection
When EN is set HIGH and the device temperature exceeds 125 °C, the Over-temperature
protection (OTP) circuit disables the N-channel MOSFET. It indicates a fault condition by
setting the FAULT pin LOW. Any transition on the EN pin has no effect. Once the device
temperature decreases to below 115 °C, the device returns to the defined state. The OTP
circuit is disabled in low-power mode. However, if the OTP circuit is active, setting the EN
pin LOW does not return the device to low-power mode.
8.7 Reverse bias current/back drive protection
When EN is set HIGH, if (VINT + 30 mV) < VBUS < (VINT + 0.45 V) for longer than 4 ms,
or if VBUS > (VINT + 0.45 V), the reverse-bias current protection circuit (RCP) disables
the N-channel MOSFET. It indicates a fault condition by setting the FAULT pin LOW. Once
VBUS < VINT for longer than 4 ms the device returns to the defined state. If the RCP
circuit is active, setting the EN pin LOW returns the device to low-power mode.
8.8 FAULT output
The FAULT output is an open-drain output that requires an external pull-up resistor. If any
of the UVLO, OVLO, RCP, OCP or OTP circuits are activated the FAULT output is set
LOW to indicate a fault has occurred. The FAULT output returns to the high impedance
state automatically once the fault condition is removed.
8.9 VDET output
VDET is an analog output that allows a controller to monitor the voltage level on VBUS.
NX5P1000
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 14 January 2014
© NXP B.V. 2014. All rights reserved.
5 of 19
5 Page 
NXP Semiconductors
NX5P1000
Logic controlled high-side power switch
521
Pȍ
DDD
521
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DDD
7DPE &
(1) VI(VINT) = 5.5 V
(2) VI(VINT) = 4.0 V
Fig 13. Typical ON resistance versus temperature
9,17 9
(1) Tamb = 85 C
(2) Tamb = 25 C
(3) Tamb = 40 C
Fig 14. Typical ON resistance versus input voltage
14. Dynamic characteristics
Table 11. Dynamic characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V); for test circuit see Figure 16.
VI(VINT) = 4.0 V to 5.5 V.
Symbol Parameter
Conditions
Tamb = 25 C
Tamb = 40 C to +85 C
Min Typ Max
Min
Max
ten enable time
EN to VBUS; see Figure 15
- 0.24 -
0.16
-
tdis disable time
EN to VBUS; see Figure 15
- 1.5 -
-
-
ton turn-on time
EN to VBUS; see Figure 15
- 0.63 -
0.52
-
toff turn-off time
EN to VBUS; see Figure 15
- 34.5 -
-
-
tTLH LOW to HIGH
VBUS; see Figure 15
output transition
time
- 0.39 -
0.16
-
tTHL HIGH to LOW
VBUS; see Figure 15
output transition
time
- 33 -
-
-
Unit
ms
ms
ms
ms
ms
ms
NX5P1000
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 14 January 2014
© NXP B.V. 2014. All rights reserved.
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