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Número de pieza | SL2304NZ | |
Descripción | Low Jitter and Skew DC to 140MHz Clock Buffer | |
Fabricantes | Silicon Laboratories | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de SL2304NZ (archivo pdf) en la parte inferior de esta página. Total 9 Páginas | ||
No Preview Available ! SL2304NZ
Low Jitter and Skew DC to 140MHz Clock Buffer
Key Features
• DC to 140 MHz operating frequency range
• Low output clock skew: 50ps-typ
• Low part-to-part output skew: 100 ps-typ
• Low output propogation delay: 2.5ns-typ
• 3.3V +/-10% operation supply voltage
• Low power dissipation:
• - 7 mA-typ at 33MHz
• - 9 mA-typ at 66MHz
• - 12 mA-typ at 133MHz
• One input to four output fanout buffer drivers
• Output Enable (OE) control function
• Available in 8-pin TSSOP package
• Available in Commercial and Industrial grades
• Available in Lead (Pb) free package
Applications
• General Purpose PCI/PCI-X Clock Buffer
• Printers, MFPs and Digital Copiers
• PCs and Work Stations
• Routers, Switches and Servers
• Datacom and Telecom
• High-Speed Digital Embeded Systems
Block Diagram
Description
The SL2304NZ is a low skew, jitter and power fanout
Buffer designed to produce up to four (4) clock outputs
from one (1) reference input clock, for high speed clock
distribution, including PCI/PCI-X applications.
The SL2304NZ products operate from DC to 140MHz.
The only difference between SL2304NZ-1 and SL2304NZ-
1Z is the OE logic implementation. Refer to the Available
OE Logic Configuration Table. 1
Refer to SL23EP04NZ products for DC to 220MHz-max
frequency range and 2.5V to 3.3V power supply operation,
improved skew, jitter and higher drive options.
Benefits
• Up to four (4) distribution of input clock
• Low propogation delay
• Low output-to-output skew
• Low output clock Jitter
• Low power dissipation
OE
Logic
Control
CLKIN
VDD
GND
CLK1
CLK2
CLK3
CLK4
Rev 2.1, May 6, 2008
2400 West Cesar Chavez, Austin, TX 78701 1+(512) 416-8500
1+(512) 416-9669
Page 1 of 9
www.silabs.com
1 page SL2304NZ
DC Electrical Characteristics (C-Grade and VDD=3.3V)
Unless otherwise stated VDD= 3.3V+/- 10%, CL=15pF and Ambient Temperature range 0 to +70°C
Description
Symbol
Condition
Min Typ Max
Input Low Voltage
VINL CLKIN and OE
– – 0.8
Input High Voltage
VINH CLKIN and OE
2.0 – VDD+0.3
Input Low Current
IINL 0 < VIN < 0.8V
-5 +/-2 5
Input High Current
IINH 2.4V < VIN < VDD
-5 +/-2 5
Output Low Voltage
VOL1
VOL2
IOL=24mA
IOL=12mA
– – 0.80
– – 0.55
Output High Voltage
VOH1
VOH1
IOH=-24mA
IOH=-12mA
2.0 –
2.4 –
–
–
Power Supply Current
IDD1
CLKIN=33MHz
CL=0 (No load at outputs)
– 7 11
Power Supply Current
IDD2
CLKIN=66MHz
CL=0 (No load at outputs)
– 9 14
Power Supply Current
IDD3
CLKIN=133MHz
CL=0 (No load at outputs)
– 12 18
Switching Electrical Characteristics (C-Grade and VDD=3.3V)
Unless otherwise stated VDD= 3.3V+/- 10%, CL=15pF and Ambient Temperature range 0 to +70°C
Description
Symbol
Condition
Min Typ
Output Frequency Range
FOUT1
FOUT1
CL=15pF
CL=30pF
DC –
DC –
Output Rise/Fall Time
tr/f-1
Measured at 0.8V to 2.0V
CL=15pF
––
Output Rise/Fall Time
tr/f-2
Measured at 0.8V to 2.0V
CL=30pF
––
Input Duty Cycle
DC1 Measured at VDD/2
20 50
Output Duty Cycle
DC2
CL=15pF, Fout=140MHz
Measured at VDD/2
45 –
Output Duty Cycle
DC3
CL=30pF, Fout=100MHz
Measured at VDD/2
40 –
Output to Output Skew
SKW1
Measured at VDD/2 and
Outputs are equally loaded
– 50
Part to Part Skew
SKW2
Measured at VDD/2 and
Outputs are equally loaded
– 100
Propagation Delay Time
PDT
Measured at VDD/2 from CLKIN to
Output Clock rising edge
1.5 2.5
Cycle-to-Cycle Jitter
CCJ1 CLKIN=66MHz and CL=15
– 75
Cycle-to-Cycle Jitter
CCJ2 CLKIN=133MHz and CL=15
– 50
Max
140
100
2.0
2.4
80
55
60
100
200
3.5
150
100
Unit
V
V
µA
µA
V
V
V
V
mA
mA
mA
Unit
MHz
MHz
ns
ns
%
%
%
ps
ps
ns
ps
ps
Rev 2.1, May 6, 2008
Page 5 of 9
5 Page |
Páginas | Total 9 Páginas | |
PDF Descargar | [ Datasheet SL2304NZ.PDF ] |
Número de pieza | Descripción | Fabricantes |
SL2304NZ | Low Jitter and Skew DC to 140MHz Clock Buffer | Silicon Laboratories |
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