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PDF SI8652 Data sheet ( Hoja de datos )
| Número de pieza | SI8652 | |
| Descripción | LOW POWER FIVE-CHANNEL DIGITAL ISOLATOR | |
| Fabricantes | Silicon Laboratories | |
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Si8650/51/52/55
LOW POWER FIVE-CHANNEL DIGITAL ISOLATOR
Features
High-speed operation
Selectable fail-safe mode
DC to 150 Mbps
Default high or low output
No start-up initialization required
(ordering option)
Wide Operating Supply Voltage
Precise timing (typical)
2.5–5.5 V
10 ns propagation delay
Up to 5000 VRMS isolation
60-year life at rated working voltage
1.5 ns pulse width distortion
0.5 ns channel-channel skew
High electromagnetic immunity
Ultra low power (typical)
5 V Operation
1.6 mA per channel at 1 Mbps
5.5 mA per channel at 100 Mbps
2.5 V Operation
1.5 mA per channel at 1 Mbps
3.5 mA per channel at 100 Mbps
Tri-state outputs with ENABLE
Schmitt trigger inputs
2 ns propagation delay skew
5 ns minimum pulse width
Transient Immunity 50 kV/µs
AEC-Q100 qualification
Wide temperature range
–40 to 125 °C
RoHS-compliant packages
SOIC-16 wide body
SOIC-16 narrow body
QSOP-16
Applications
Industrial automation systems
Medical electronics
Hybrid electric vehicles
Isolated switch mode supplies
Isolated ADC, DAC
Motor control
Power inverters
Communication systems
Safety Regulatory Approvals
UL 1577 recognized
VDE certification conformity
Up to 5000 VRMS for 1 minute
IEC 60747-5-2
CSA component notice 5A approval
(VDE0884 Part 2)
IEC 60950-1, 61010-1, 60601-1
EN60950-1
(reinforced insulation)
(reinforced insulation)
CQC certification approval
GB4943.1
Ordering Information:
See page 30.
Description
Silicon Lab's family of ultra-low-power digital isolators are CMOS devices
offering substantial data rate, propagation delay, power, size, reliability, and
external BOM advantages over legacy isolation technologies. The operating
parameters of these products remain stable across wide temperature ranges
and throughout device service life for ease of design and highly uniform
performance. All device versions have Schmitt trigger inputs for high noise
immunity and only require VDD bypass capacitors.
Data rates up to 150 Mbps are supported, and all devices achieve propagation
delays of less than 10 ns. Enable inputs provide a single point control for
enabling and disabling output drive. Ordering options include a choice of
isolation ratings (2.5, 3.75 and 5 kV) and a selectable fail-safe operating mode
to control the default output state during power loss. All products >1 kVRMS are
safety certified by UL, CSA, VDE, and CQC, and products in wide-body
packages support reinforced insulation withstanding up to 5 kVRMS.
Rev. 1.8 6/15
Copyright © 2015 by Silicon Laboratories
Si8650/51/52/55
1 page  
Si8650/51/52/55
Table 2. Electrical Characteristics (Continued)
(VDD1 = 5 V±10%, VDD2 = 5 V±10%, TA = –40 to 125 °C)
Parameter
Symbol
Test Condition
Min Typ Max Unit
DC Supply Current (All inputs 0 V or at Supply)
Si8650Bx, Ex, Si8655Bx
VDD1
VDD2
VDD1
VDD2
VI = 0(Bx), 1(Ex)
VI = 0(Bx), 1(Ex)
VI = 1(Bx), 0(Ex)
VI = 1(Bx), 0(Ex)
— 1.1 1.8
— 3.1 4.7
— 7.0 9.8
— 3.3 5.0
Si8651Bx, Ex
VDD1
VDD2
VDD1
VDD2
VI = 0(Bx), 1(Ex)
VI = 0(Bx), 1(Ex)
VI = 1(Bx), 0(Ex)
VI = 1(Bx), 0(Ex)
— 1.5 2.4
— 2.7 4.1
— 6.6 9.2
— 4.0 6.0
Si8652Bx, Ex
VDD1
VDD2
VDD1
VDD2
VI = 0(Bx), 1(Ex)
VI = 0(Bx), 1(Ex)
VI = 1(Bx), 0(Ex)
VI = 1(Bx), 0(Ex)
— 2.0 3.0
— 2.4 3.6
— 5.6 7.8
— 5.0 7.5
1 Mbps Supply Current (All inputs = 500 kHz square wave, CI = 15 pF on all outputs)
mA
mA
mA
Si8650Bx, Ex, Si8655Bx
VDD1
VDD2
— 4.1 5.7
— 3.7 5.2
Si8651Bx, Ex
VDD1
VDD2
— 4.2 5.8
— 3.8 5.3
Si8652Bx, Ex
VDD1
VDD2
— 4.0 5.6
— 4.0 5.6
10 Mbps Supply Current (All inputs = 5 MHz square wave, CI = 15 pF on all outputs)
mA
mA
mA
Si8650Bx, Ex, Si8655Bx
VDD1
VDD2
— 4.1 5.7 mA
— 5.2 7.2
Si8651Bx, Ex
VDD1
VDD2
— 4.4 6.2 mA
— 4.9 6.9
Si8652Bx, Ex
VDD1
VDD2
— 4.6 6.4 mA
— 4.9 6.8
Notes:
1. The nominal output impedance of an isolator driver channel is approximately 50 , ±40%, which is a combination of
the value of the on-chip series termination resistor and channel resistance of the output driver FET. When driving loads
where transmission line effects will be a factor, output pins should be appropriately terminated with controlled
impedance PCB traces.
2. tPSK(P-P) is the magnitude of the difference in propagation delay times measured between different units operating at
the same supply voltages, load, and ambient temperature.
3. Start-up time is the time period from the application of power to valid data at the output.
Rev. 1.8
5
5 Page 
Si8650/51/52/55
Table 3. Electrical Characteristics (Continued)
(VDD1 = 3.3 V±10%, VDD2 = 3.3 V±10%, TA = –40 to 125 °C)
Parameter
Symbol
Test Condition
Min
Typ
Max
Unit
Timing Characteristics
Si865xBx, Ex
Maximum Data Rate
0 — 150 Mbps
Minimum Pulse Width
— — 5.0 ns
Propagation Delay
Pulse Width Distortion
|tPLH – tPHL|
Propagation Delay Skew2
Channel-Channel Skew
All Models
tPHL, tPLH
PWD
tPSK(P-P)
tPSK
See Figure 2
See Figure 2
5.0 8.0 13 ns
— 0.2 4.5 ns
— 2.0 4.5 ns
— 0.4 2.5 ns
Output Rise Time
tr
CL = 15 pF
See Figure 2
— 2.5 4.0 ns
Output Fall Time
tf
CL = 15 pF
(See Figure 2)
— 2.5 4.0 ns
Peak eye diagram jitter
Common Mode
Transient Immunity
tJIT(PK)
CMTI
(See Figure 8)
VI = VDD or 0 V
VCM = 1500 V
(See Figure 3)
— 350 —
ps
35 50 — kV/µs
Enable to Data Valid
Enable to Data Tri-State
Start-Up Time3
ten1 See Figure 1
ten2 See Figure 1
tSU
— 6.0 11
ns
— 8.0 12 ns
— 15 40 µs
Notes:
1. The nominal output impedance of an isolator driver channel is approximately 50 , ±40%, which is a combination of
the value of the on-chip series termination resistor and channel resistance of the output driver FET. When driving loads
where transmission line effects will be a factor, output pins should be appropriately terminated with controlled
impedance PCB traces.
2. tPSK(P-P) is the magnitude of the difference in propagation delay times measured between different units operating at
the same supply voltages, load, and ambient temperature.
3. Start-up time is the time period from the application of power to valid data at the output.
Rev. 1.8
11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet SI8652.PDF ] | |
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