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PDF SM3320AGA Data sheet ( Hoja de datos )
| Número de pieza | SM3320AGA | |
| Descripción | Optical Sensor IC | |
| Fabricantes | NPC | |
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SM3320AGA
Optical Sensor IC
OVERVIEW
The SM3320AGA is an image sensor IC with a built-in single picture element (pixel) photodiode of 1mm2 and programmable signal
conditioning circuit. The IC has an optical filter on chip with target condition 585nm±30nm, and it integrates all the elements required for
optical sensor into an ultra-miniature package. The signal condition circuit has a programmable gain amplifier with dark current
compensation circuit, so that it can operate in wider temperature range. With 3 addressing bits, up to 8 SM3320AGAcan be paralleled.
FEATURES
▪ Optical filter on chip with target condition: 585nm±30nm
▪ Dark current compensation circuit built-in for stable signal output
▪ Gain setting and output control function using serial interface
(DATA, SE, CLK, OE)
▪ Connection up to 8 devices in parallel according to 3-bit address setting
▪ Transimpedance range: 500kΩ to 240MΩ
▪ Photodiode detector size: 2.3mm×0.6mm
(1.0mm2 photodetector surface area)
▪Anti-reflection film coating with little sensitivity changing by wavelength
▪ Supply voltage range: 2.7 to 5.5V (single supply)
▪ Current consumption: 1.5mA(typ)@VDD=5V, no load
▪ Operating temperature range: -40 to +85°C
▪ Package: 12 pin HCOB
ORDERING INFORMATION
Device
Package
SM3320AGA
12 pin HCOB
PACKAGE DIMENSIONS
(Unit: mm)
Y
B
Photodiode detector
A
X
3.2 ±0.1
1.15 ±0.2
Photodiode detector dimensions(Origin:Package center)
X
A -1.15
B 1.15
Y
-0.7
-0.1
0.35 0.5
0.25±0.05
Package type : 12pin HCOB
Package size : 3.2mm×5.5mm
Photodiode detector size : 2.3mm×0.6mm
(1.0mm2 photo detector surface area)
TYPICAL APPLICATION CIRCUIT
SM3320AGA
IC1
SM3320AGA
IC2
SM3320AGA
IC3
ADC
ADC
CPU
SEIKO NPC CORPORATION - 1
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SM3320AGA
Photodiode Characteristics
Recommended operating conditions using reference circuit, unless otherwise noted.
Parameter*1
Symbol Conditions MIN TYP MAX Unit
Photodetector sensitivity 1*1
S1/S4
470nm
-
- 20 %
Photodetector sensitivity 2*1
S2/S4
525nm
-
- 30 %
Photodetector sensitivity 3*1
S3/S4
545nm
-
- 60 %
Photodetector sensitivity 4*1
S4
590nm
0.23 0.33
-
A/W
Photodetector sensitivity 5*1
S5/S4
630nm
-
- 60 %
Photodetector sensitivity 6*1
S6/S4
870nm
-
- 30 %
*1. Typical characteristics determined on standalone device.
Photodiode spectral responsivity charactreistic (typ)
0.5
0.4
0.3
0.2
0.1
0
300 400 500 600 700 800 900 1000 1100 1200
Wavelength [nm]
Photodiode spectral responsivity
Photodiode spectral responsivity charactreistic (typ)
0.5
0.4
0.3
0.2
0.1
0
500 520 540 560 580 600 620 640 660
Wavelength [nm]
Photodiode spectral responsivity (500nm~680nm)
SEIKO NPC CORPORATION - 5
5 Page 
SM3320AGA
Reading Data from the Register (OE = LOW or open-circuit)
Serial interface operation starts when SE goes HIGH.
Read data comprises 1 read/write mode bit (read mode = 1), 3 address bits, and 4 dummy data bits transferred in sequence when OE is
open-circuit or goes LOW. The address control pin setting is compared with the address register setting on the falling edge of the 8th CLK
pulse. If the settings match (meaning the device is addressed), the data in the 8-bit analog adjustment code register is read out in sequence.
On the serial interface, the GS0 data bit is transferred on the 15th falling edge of CLK, and then any data bits transferred between the 16th
falling edge of CLK and the falling edge on SE are undefined data. Serial interface operation ends when SE goes LOW, and the DATA
terminal reverts to an input. Make sure there are not less than nor more than 16 input pulses on the CLK clock. If the number of clock
pulses is incorrect, incorrect data may be written to the register or read from the register.
Register read
SE
DATA
CLK
R/W A2 A1 A0 - - - - CS1 CS0 TS1 TS0 GS3 GS2 GS1 GS0 -
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
SEIKO NPC CORPORATION - 11
11 Page | ||
| Páginas | Total 15 Páginas | |
| PDF Descargar | [ Datasheet SM3320AGA.PDF ] | |
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