PDF AS3695A Data sheet ( Hoja de datos )

Número de pieza	AS3695A
Descripción	16 channel white LED driver
Fabricantes	austriamicrosystems
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Hay una vista previa y un enlace de descarga de AS3695A (archivo pdf) en la parte inferior de esta página. Total 30 Páginas
No Preview Available ! AS3693B AS3695A 16 channel white LED driver for LCD backlight austriamicrosystems Product Specification, Confidential General Description The AS3695A is a 16 channels precision LED driver for use in LCD-backlight panels. Dynamic power feedback controls the external power supply to guarantee best efficiency. Build in safety features include thermal shutdown as well as open and short LED detection. The device is programmable via serial interface. 16 Channel LED driver Output voltage max. 30V Output current 120mA Linear current setting using 10-bit DAC Current accuracy ±0.5% @ VDAC=250mV Channel to Channel current accuracy ±0.2% Output slew rate programmable Current programmable with external resistor Digital current control with 16 independent PWM generators Free programmable 12 bit resolution ( period, high time and delay ) PWM-generator clock Internal RC-oscillator External Clock H-Sync, V-Sync inputs to synchronize with TV-set Direct PWM mode Undervoltage detection ( open LED ) Undervoltage auto-turnoff Overvoltage detection ( short LED ) Overvoltage auto-turnoff Temperature shutdown Register lock/unlock function Fault interrupt output 2 configurable supply regulation feedback outputs SPI interface 6kV ESD at current sink inputs 2kV ESD an all other pins Package QFN48 7x7mm, 0.5mm pitch Applications LED backlighting for LCD – TV sets and monitors 1 Block diagram VDD VDD VDD FB1 FB2 V2_5 VSSA VSSA VSS_SENSE CURR1 RES1 CURR2 RES2 CURR3 RES3 CURR4 RES4 CURR5 RES5 CURR6 RES6 CURR7 RES7 CURR8 RES8 PWM Reference DAC PWM PWM Fault detectors PWM PWM SMPS feedback PWM PWM PWM AS3695A PWM PWM PWM PWM PWM Registers PWM PWM SPI Interface PWM CURR16 RES16 CURR15 RES15 CURR14 RES14 CURR13 RES13 CURR12 RES12 CURR11 RES11 CURR10 RES10 CURR9 RES9 xRES xCS SDI SCL SDO HSYNC VSYNC EPAD xFAULT VDD www.austriamicrosystems.com Rev 1.10 / 2010-12-8 1 - 33 1 page AS3695A austriamicrosystems Symbol Parameter Vopen Open LED detection Voltage at Pin Sx Tovtemp Thyst Over temperature limit Over termperature hysteresis Conditions Programmable, Tolerance ±10% Min Typ Max Unit 50 100 200 VDAC /2 mV mV mV V 130 140 150 °C 10 °C 3.2.5 PWM-generators Symbol fOSC fHSYNC fVSYNC Parameter Internal Clock for PWM HSYNC frequency VSYNC frequency Conditions Min Typ Max Unit 400 500 600 kHz 100 2000 kHz 60 480 Hz 3.2.6 Digital pins Symbol Parameter Min Typ Max Unit VIH High Level Input voltage 1.3 VDD V VIL Low Level Input voltage -0.3 0.8 V VoH High Level output voltage VDD- 0.3 V I=mA VoL Low Level output voltage VDD- 0.3 V I=mA VoL_PD Low level output voltage open drain outputs VDD- 0.3 V I=mA R_pu Input resistance PullUp inputs 300 kΩ R_pd Input resistance PullDown inputs 300 kΩ Note 3.2.7 SPI-timings Symbol fsclk t1 t2 t3 t4 t5 t6 t7 t8 t9 t10 Parameter SCLK frequency xCS setup time xCS hold time xCS disable time SDI setup time SDI hold time SCLK rise time SCLK fall time SCLK low time SCLK high time output valid from SCLK low Min Typ Max Unit 0 10 MHz 50 ns 100 ns 100 ns 5 ns 5 ns 5 ns 5 ns 40 ns 40 ns 10 ns Note www.austriamicrosystems.com Rev 1.10 / 2010-12-8 5 - 33 5 Page AS3695A austriamicrosystems RegAddr: 0x0E 0x0D Bit Bit 1:0 7:0 DAC Description DAC[9:0] defines DADC output voltage DACvoltage = DAC[9:0]DACref/1024 Default 1000000000 Access r/w 4.2 PWM-generators 60 - 480Hz Hsync Vsync RC-Oscillator 500kHz ±20% ClockSrc0 VSYNCedge clk res Periode PW Mper High Time PW M16HT PW M15HT : : PW M2HT PW M1HT Delay PW M16del PW M15del : : PW M2del PW M1del Reverse PW Mrev 16 x PWM - generator UpdateMode SDI SDO SCLK xCS SPI interface Vsync detect VSYNCdet 4.2.1 Clock and reset The clock for the build in PWM-generators can be one of two different sources. 1. Internal RC oscillator with 500KHz +-20% 2. External Clock signal. This is usually the HSYNC signal of the TV. PW Mext PWMx 4.2.2 PWM-counter res clk PW Mxdel Delay Reset Reset Or R Counter PW Mper Compare Compare PW MxHT PWM PW Mrev Each PWM-generator is build with a 12bit counter and digital comparators. The counter is counting up with tclk until the value stored in “PWMper” is reached. This resets the counter and starts the next period. While the counter value is below “PWMxHT” the PWM-singal is “1”, the rest of the period the PWM- signal is “0”. The output of each PWM-generator can also be inverted by means of the “PWMrev”. clk VSYNC PWMx PWMxDEL tclk PWMxHT tclk PWMper tclk www.austriamicrosystems.com Rev 1.10 / 2010-12-8 11 - 33 11 Page

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