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PDF ML610Q174 Data sheet ( Hoja de datos )

Número de pieza ML610Q174
Descripción The low power micro controller corresponding to 5v
Fabricantes LAPIS Semiconductor 
Logotipo LAPIS Semiconductor Logotipo



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No Preview Available ! ML610Q174 Hoja de datos, Descripción, Manual

ML610Q174
The low power micro controller corresponding to 5v for household appliances
I
GENERAL DESCRIPTION
FEDL610Q174-01
Issue Date: Oct 25, 2013
This LSI is a high-performance 8-bit CMOS microcontroller into which rich peripheral circuits, such as 10-bit
A/D converter, timer, PWM, synchronous serial port, UART, I2C bus interface (master), Battery level detect
circuit, LCD driver, are incorporated around 8-bit CPU nX-U8/100.
The CPU nX-U8/100 is capable of efficient instruction execution in 1-instruction 1-clock mode by 3-stage pipe
line architecture parallel procesing.
The on-chip debug function that is installed enables program debugging and programming.
FEATURES
CPU
8-bit RISC CPU (CPU name: nX-U8/100)
Instruction system:16-bit instructions
Instruction set:Transfer, arithmetic operations, comparison, logic operations, multiplication/division, bit
manipulations, bit logic operations, jump, conditional jump, call return stack manipulations, arithmetic
shift, and so on
On-Chip debug function
Minimum instruction execution time
Approx 30.5 μs (at 32.768kHz system clock)
Approx 0.122 μs (at 8.192MHz system clock)VDD = 2.2 to 5.5V
Internal memory
Internal 128-Kbyte flash ROM(64K × 16-bit)
Internal 2-Kbyte Data Flash (1-Kbyte × 2)
Internal 4-Kbyte RAM (4096 × 8 -bit)
(including unusable 1KByte TEST area)
Interrupt controller
1 non-maskable interrupt sources (Internal source: 1, External source: 1)
26 maskable interrupt sources (Internal source: 22, External source: 4)
Time base counter
Low-speed time base counter × 1 channel
High-speed time base counter × 1 channel
Watchdog timer
Generates a non-maskable interrupt upon the first overflow and a system reset occurs upon the second
Free running
Overflow period: 4 types selectable (125ms, 500ms, 2s, and 8s)
Timers
8 bits × 6ch (16-bit configuration available)
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ML610Q174 pdf
PIN CONFIGURATION
ML610Q174 QFP package product
64pin
65pin
PF0/SEG32/SIN0
PF1/SEG33/SCK0
PF2/SEG34/ RXD0/SOUT0
PF3/SEG35/TXD0/PWM4/TXD1
PF4/SEG36/SIN1/PWM4
PF5/SEG37/SCK1/PWM5
PF6/SEG38/RXD1/SOUT1/PWM6
PF7/SEG39/TXD1/TXD0
TEST0
TEST1_N
P00/EXI0/PW45EV0
P01/EXI1/PW6EV0
P02/EXI2/RXD0
P03/EXI3/RXD1
P20/LED0/LSCLK/PWM4
P21/LED1/OUTCLK/PWM5
80pin
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
1pin
FEDL610Q174-01
ML610Q174
41pin
40pin
40 P80/COM0
39 P81/COM1
38 P82/COM2
37 P83/COM3
36 P84/VL1
35 P85/VL2
34 VL3
33 P36/LSCLK
32 RESET_N
31 XT1
30 XT0
29 VDDL
28 VDD
27 VSS
26 P11/OSC1
25 P10/OSC0
25pin
24pin
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5 Page





ML610Q174 arduino
FEDL610Q174-01
ML610Q174
Pin name I/O
Description
Primary/
Secondary
Logic
Timer
T0P4CK
T1P5CK
T8AP6CK
T9BCK
TM9OUT
TMBOUT
I
External clock input pin for timer 0 and PWM4. Allocated to the primary
function of the P44 pin.
I
External clock input pin for timer 1 and PWM5. Allocated to the primary
function of the P45 pin.
I
External clock input pin for timer 8 and timer A and PWM6. Allocated to the
primary function of the P46 pin.
I
External clock input pin for timer 9 and timer B. Allocated to the primary
function of the P47 pin.
O
Timer9 overflow output pin. Allocated to the secondary function of the P22
pin.
O
TimerB overflow output pin. Allocated to the secondary function of the P23
pin.
Primary
Primary
Primary
Primary
Tertiary
Tertiary
Positive
Positive
LED drive
LED0-LED5
O
Pins for LED driving. Allocated to the primary function of the P20–P23 pins
and P90–P91 pins.
Primary
Positive/
Negative
Successive-approximation type A/D converter
VREF
I
Reference power supply pin for successive approximation type A/D
converter.
AIN0–AIN11
Analog inputs to Ch0–Ch11 of the successive-approximation type A/D
I converter. Allocated to the secondary function of the P30 to P35 and P44 to
P47 and P50 to P51 pins.
Analog Comparator
CMP0P
CMP0M
CMP1P
CMP1M
I
Non-inverting input for comparator0. This pin is used as the primary
function of the P52 pin.
I
Inverting input for comparator0. This pin is used as the primary function of
the P46 pin.
I
Non-inverting input for comparator1. This pin is used as the primary
function of the P53 pin.
I
Inverting input for comparator1. This pin is used as the primary function of
the P47 pin.
LCD driver
COM0 to COM3
O LCD common output pins.
——
SEG0 to SEG7
O LCD segment output pins.
——
SEG8 to SEG23
SEG32 to SEG39
O
LCD segment output pins. Allocated to the secondary function of the
PC0 to PC7 and PD0 to PD7 and PF0 to PF7 pins.
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