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PDF PVHT1206 Data sheet ( Hoja de datos )
| Número de pieza | PVHT1206 | |
| Descripción | Thin Film Wraparound Chip Resistors | |
| Fabricantes | Vishay | |
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www.vishay.com
PVHT
Vishay Sfernice
High Stability - Very High Temperature (270 °C)
Thin Film Wraparound Chip Resistors, Sulfur Resistant
INTRODUCTION
For applications such as down hole applications, the need
for parts able to withstand very severe conditions
(temperature as high as 250 °C powered or up to 270 °C
un-powered) has led Vishay Sfernice to push out the limit of
the thin film technology.
Designers might read the application note “Power
Dissipation Considerations in High Precision Vishay
Sfernice Thin Film Chip Resistors and Arrays
(P, PRA etc…) (High Temperature Application)”
www.vishay.com/doc?53047 in conjunction with this
datasheet to help them to properly design their board and
get the best performances of the PVHT.
Vishay Sfernice research and development engineers will be
willing to support any customer design considerations.
FEATURES
• Operating temperature range: -55 °C; +250 °C
• Storage temperature: -55 °C; +270 °C
• Gold terminations (< 1 μm thick)
• 5 sizes available (0402, 0603, 0805, 1206,
2010); other sizes upon request
• Temperature coefficient down to 5 ppm/°C
typical, 10 ppm/°C maximum (-55 °C; +270 °C)
• Tolerance down to 0.05 %
• Load life stability: 0.8 % typical (1 % max.) after 2000 h at
250 °C (ambient) at Pn
• Shelf life stability: 1.5 % typical after 8000 h
• SMD wraparound
• 0.02 % upon request
• TCR remains constant after long term storage at 270 °C
• Sulfur resistant (per ASTM B809-95 humid vapor test)
• Material categorization: for definitions of compliance
please see www.vishay.com/doc?99912
STANDARD ELECTRICAL SPECIFICATIONS
MODEL
SIZE
RESISTANCE
RANGE
Ω
RATED POWER (1)(2)
P250 °C
W
PVHT0402 0402
39 to 45K
0.031
PVHT0603 0603 39 to 108K
0.062
LIMITING ELEMENT
VOLTAGE
V
50
75
TOLERANCE
±%
0.05, 0.1, 0.5, 1
0.05, 0.1, 0.5, 1
TEMPERATURE
COEFFICIENT (3)
± ppm/°C
5, 10, 15, 25, 30, 50, 55
5, 10, 15, 25, 30, 50, 55
PVHT0805 0805 39 to 240K
0.100
150 0.05, 0.1, 0.5, 1 5, 10, 15, 25, 30, 50, 55
PVHT1206 1206
PVHT2010 2010
39 to 900K
39 to 2.5M
0.165
0.2
200 0.05, 0.1, 0.5, 1 5, 10, 15, 25, 30, 50, 55
300 0.05, 0.1, 0.5, 1 5, 10, 15, 25, 30, 50, 55
Notes
(1) For power handling improvement, please refer to application note 53047 “Power Dissipation Considerations in High Precision Vishay
Sfernice Thin Film Chip Resistors and Arrays (High Temperature Applications)” www.vishay.com/doc?/53047 and consult Vishay Sfernice
(2) See derating curve on next page
(3) See Table 1 on next page
CLIMATIC SPECIFICATIONS
Operating temperature range
-55 °C; +250 °C
Storage temperature range
-55 °C; +270 °C
PERFORMANCE VS. HUMID SULFUR VAPOR
Test conditions
50 °C ± 2 °C, 85 % ± 4 % RH,
exposure time 500 h
Test results
Resistance drift < (0.05 % R + 0.05 Ω),
no corrosion products observed
MECHANICAL SPECIFICATIONS
Substrate
Alumina
Resistive Element
Thin Film
Passivation
Protection
Silicon nitride (Si3N4)
Epoxy + Silicone
Terminations
Gold (< 1 μm) over nickel barrier
Caution:
Performances obtained with following mounting conditions:
• Test board material: alumina
• Solder paste: PbSnAg (93.5/5/1.5)
Revision: 13-Nov-15
1 Document Number: 53060
For technical questions, contact: [email protected]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
1 page  
www.vishay.com
PVHT
Vishay Sfernice
CODIFICATION OF PACKAGING
CODE
WAFFLE PACK
W
WA
PLASTIC TAPE (standard tape for all sizes, except 0402)
T
TA
TB
TC
TD
TE
TF
PAPER TAPE (standard for 0402, upon request for other sizes)
PT
PA
PB
PC
PD
PE
PF
PACKAGING
100 min., 1 mult
100 min., 100 mult (available only in size 1206)
100 min., 1 mult
100 min., 100 mult
250 min., 250 mult
500 min., 500 mult
1000 min., 1000 mult
2500 min., 2500 mult
Full tape (quantity depending on size of chips)
100 min., 1 mult
100 min., 100 mult
250 min., 250 mult
500 min., 500 mult
1000 min., 1000 mult
2500 min., 2500 mult
Full tape (quantity depending on size of chips)
Revision: 13-Nov-15
5 Document Number: 53060
For technical questions, contact: [email protected]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
5 Page | ||
| Páginas | Total 6 Páginas | |
| PDF Descargar | [ Datasheet PVHT1206.PDF ] | |
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