|
|
PDF ASM2P3807A Data sheet ( Hoja de datos )
| Número de pieza | ASM2P3807A | |
| Descripción | 3.3V CMOS 1-TO-10 CLOCK DRIVER | |
| Fabricantes | PulseCore | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de ASM2P3807A (archivo pdf) en la parte inferior de esta página. Total 18 Páginas | ||
|
No Preview Available !
November 2006
rev 0.3
3.3V CMOS 1-TO-10 CLOCK DRIVER
ASM2P3807A
Features
• 0.5 MICRON CMOS Technology
• Guaranteed low skew < 350pS (max.)
• Very low duty cycle distortion < 350pS (max.)
• High speed: propagation delay < 3nS (max.)
• Very low CMOS power levels
• TTL compatible inputs and outputs
• 1:10 fanout
• Maximum output rise and fall time < 1.5nS (max.)
• Low input capacitance: 4.5pF typical
• Operates with 3.3V ± 0.3V Supply
• Inputs can be driven from 3.3V or 5V components
• Available in SSOP, SOIC, and QSOP Packages
Block Diagram
Product Description
The ASM2P3807A 3.3V clock driver is built using advanced
dual metal CMOS technology. This low skew clock driver
offers 1:10 fanout. The large fanout from a single input
reduces loading on the preceding driver and provides an
efficient clock distribution network. The ASM2P3807A
offers low capacitance inputs with hysteresis for improved
noise margins. Multiple power and grounds reduce noise.
Typical applications are clock and signal distribution.
O1
O2
O3
O4
O5
IN
O6
O7
O8
O9
O10
PulseCore Semiconductor Corporation
1715 S. Bascom Ave Suite 200, Campbell, CA 95008 • Tel: 408-879-9077 • Fax: 408-879-9018
www.pulsecoresemi.com
Notice: The information in this document is subject to change without notice.
1 page  
November 2006
rev 0.3
Switching Characteristics Over Operating Range – Commercial3,4
ASM2P3807A
Symbol
Parameter
tPLH
tPHL
tR
tF
tSK(O)
tSK(P)
tSK(T)
Propagation Delay
Output Rise Time
Output Fall Time
Output skew: skew
between outputs of
same package (same
transition)
Pulse skew: skew
between opposite
transitions of same
output (|tPHL – tPLH|)
Package skew: skew
between outputs of
different packages at
same power supply
voltage, temperature,
package type and
speed grade
Conditions1
50Ω to VCC/2
CL= 10pF
(See figure 1)
or 10Ω AC
termination,
CL= 50pF
(See figure 2)
f≤ 100MHz
Outputs
connected in
groups of two
ASM2P3807A
Min2
Max
1.5 3
1.5
1.5
0.35
0.35
0.65
Unit
nS
nS
nS
nS
nS
nS
3.3V CMOS 1-TO-10 CLOCK DRIVER
Notice: The information in this document is subject to change without notice.
5 of 18
5 Page 
November 2006
rev 0.3
Enable and Disable Time
Switch Position
Test
Disable LOW
Enable LOW
Disable HIGH
Enable HIGH
DEFINITIONS:
CL = Load capacitance: includes jig and probe capacitance.
RT = Termination resistance: should be equal to ZOUT of the Pulse Generator.
Test Waveforms
ASM2P3807A
Switch
6V
GND
INPUT
OUTPUT
INPUT
OUTPUT
tPLH
tR
tPHL
tF
3V
1.5V
OV
VOH
2.0 V 1.5 V
0.8 V
VOL
Package Delay
tPLH
tPLH
tSK(p) =[ tPHL – tPLH ]
Pulse Skew - tSK(P)
1.5V
OV
VOH
1.5 V
3V VOL
3.3V CMOS 1-TO-10 CLOCK DRIVER
Notice: The information in this document is subject to change without notice.
11 of 18
11 Page | ||
| Páginas | Total 18 Páginas | |
| PDF Descargar | [ Datasheet ASM2P3807A.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| ASM2P3807A | 3.3V CMOS 1-TO-10 CLOCK DRIVER | PulseCore |
| ASM2P3807AH | 3.3V CMOS 1-TO-10 CLOCK DRIVER | PulseCore |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |