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PDF AMMC-6530 Data sheet ( Hoja de datos )

Número de pieza AMMC-6530
Descripción 5-30 GHz Image Reject Mixer
Fabricantes AVAGO 
Logotipo AVAGO Logotipo



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AMMC-6530
5–30 GHz Image Reject Mixer
Data Sheet
Vg drain
IF1
IF2
Chip Size: 1300 x 1400 µm
Chip Size Tolerance: ±10 µm (±0.4 mils)
Chip Thickness: 100 ± 10 µm (4 ± 0.4 mils)
gate
Vg
Description
Avago’s AMMC-6530 is an image reject mixer that
­operates from 5 to 30 GHz. The cold channel FET mixer
is designed to be an easy-to-use component for any
chip and wire application. It can be used drain pumped
for low conversion loss applications, or when gate
pumped the mixer can provide high linearity for SSB
up‑conversion. An external 90‑degree hybrid is used
to achieve image rejection and a -1V voltage ­reference
is needed. Intended applications include ­ microwave
radios, 802.16, VSAT, and satellite receivers. Since this
one mixer can cover several bands, the AMMC-6530
can reduce part inventory. The ­integrated mixer elimi-
nates complex tuning and ­assembly ­processes typically
required by hybrid (discrete-FET or diode) mixers. For
improved reliability and moisture protection, the die is
passivated at the active areas.
Features
Broad Band Performance 5–30 GHz
Low Conversion Loss of 8 dB
High Image Rejection of 15–20 dB
Good 3rd Order Intercept of +18 dBm
Single -1V, no current Supply Bias
Applications
Microwave Radio Systems
Satellite VSAT, DBS Up/Down Link
LMDS & Pt-Pt mmW Long Haul
Broadband Wireless Access (including 802.16 and
802.20 WiMax)
WLL and MMDS loops
Absolute Maximum Ratings[1]
Symbol Parameters/Conditions
Units Min. Max.
Vg Gate Supply Voltage
V 0 -3
Pin CW Input Power
dBm
25
Tch Operating Channel Temperature °C
+150
Tstg Storage Case Temperature
°C -65 +150
Tmax Max. Assembly Temp (60 sec max) °C
+300
Note:
1. Operation in excess of any one of these conditions may result in permanent
damage to this device.
Attention: Observe precautions for
handling electrostatic ­sensitive devices.
ESD Machine Model (Class A)
ESD Human Body Model (Class 0)
Refer to Avago Application Note A004R:
Electrostatic Discharge Damage and Control.

1 page




AMMC-6530 pdf
AMMC-6530 Typical Performance under Gate Pumped Up Conversion ­Operation
(TA = 25°C, Vg = -1V, Zo=50Ω)
LO
LSB
-1V
Vg
gate
IF2
USB
IF1
drain
Vg
RF
0
-5
USB (dB)
LSB (dB)
-10
-15
-20
-25
-30
-35
-40
-45
-50
5 10 15 20 25
FREQUENCY (GHz)
Figure 11. Up-conversion Gain with IF
terminated for Low Side Conversion.
LO=+5 dBm, IF=+5 dBm, IF=1 GHz.
30
0
-5
-10
-15
-20
-25
-30
-35
-40
5 10 15 20 25 30
FREQUENCY (GHz)
Figure 13. LO-RF Up-conversion Isolation.
0
-5
USB (dB)
LSB (dB)
-10
-15
-20
-25
-30
-35
-40
-45
-50
5 10 15 20 25
FREQUENCY (GHz)
Figure 12. Up-conversion Gain wth IF
terminated for High Side Conversion.
LO=+5 dBm, IF=+5 dBm, IF=1 GHz.
30
-5
-7
-9
-11
-13
-15
0 2 4 6 8 10 12 14 16 18 20
PLO=PIF (dB)
Figure 14. Up-conversion Gain vs. Pumping
Power. LO power=IF power, IF=1 GHz,
RF=25 GHz.


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