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PDF LV8111VB Data sheet ( Hoja de datos )

Número de pieza LV8111VB
Descripción 3-phase Brushless Motor Driver
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No Preview Available ! LV8111VB Hoja de datos, Descripción, Manual

LV8111VB
Bi-CMOS LSI
3-phase Brushless Motor Driver
for Polygon Mirror Motor
www.onsemi.com
Overview
The LV8111VB is a 3-phase brushless motor driver for polygon mirror
motor driving of LBP.
A circuit needed to drive of polygon mirror motor can be composed of
a single-chip. Also, the output transistor is made DMOS by using
BiDC process, and by adopting the synchronous rectification method,
the lower power consumption (Heat generation) is achieved.
Feature
3-phase bipolar drive
Direct PWM drive + synchronous rectification
IO max1 = 2.5A
IO max2 = 3.0A (t 0.1ms)
Output current control circuit
PLL speed control circuit
Phase lock detection output
(with mask function)
Current limiter, constraint protection, thermal
shutdown, under-voltage protection circuit
Circuit to switch slowing down method while stopped
(Free run or Short-circuit brake)
Constraint protection detection signal switching circuit (FG or LD)
Forward / Reverse switching circuit
Compatible with Hall FG
Hall bias pin (Bias current cut in a stopped state)
5V regulator output
SDCC function (Speed Detection Current Control)
Typical Applications
Laser beam printer (LBP)
Plain paper copier (PPC)
Multi function printer (MFP)
SSOP44K(275mil) Exposed Pad
ORDERING INFORMATION
See detailed ordering and shipping information on page 15 of this data sheet.
© Semiconductor Components Industries, LLC, 2014
December 2014 - Rev. 1
1
Publication Order Number :
LV8111VB/D

1 page




LV8111VB pdf
Package Dimensions
unit : mm
SSOP44K (275mil) Exposed Pad
CASE 940AF
ISSUE A
LV8111VB
www.onsemi.com
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LV8111VB arduino
LV8111VB
Continued from preceding page.
Pin No. Pin name
Function
15 FGFIL
FG filter pin.
When the noise of the FG signal is a problem, connect a
capacitor between this pin and GND.
VREG
Equivalent circuit
15kΩ
500Ω
15
16 PH
Pin to stabilize the RF waveform.
Connect a capacitor between this pin and GND.
17 PD
Phase comparison output pin.
The phase error is output by using the duty changes of the
pulse.
18 EI
Error amplifier input pin.
VREG
VREG
500Ω
16
10kΩ
500Ω
17
VREG
19 EO
Error amplifier output pin.
20 TOC
Torque command voltage input pin.
Normally, this pin must be connected with the EO pin.
On-duty of upper-side output Tr increases when the TOC
voltage decreases.
500Ω
18
VREG
VREG
19
100kΩ
20
21 GND
Ground pin of the control circuit block.
Continued on next page.
www.onsemi.com
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