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PDF ESD7124 Data sheet ( Hoja de datos )
| Número de pieza | ESD7124 | |
| Descripción | 4-Channel Low Capacitance Dual-Voltage ESD and Surge Protection Array | |
| Fabricantes | ON Semiconductor | |
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ESD7124
4-Channel Low Capacitance
Dual-Voltage ESD and Surge
Protection Array
Features
• 3 Channels of Low Voltage ESD Protection
• 1 Channel of High Voltage ESD Protection
• Provides ESD Protection to IEC61000−4−2 Level 4:
±25 kV Contact Discharge
• IEC 61000−4−5 (lighting)
• Low Channel Input Capacitance
• High Voltage Zener Diode Protects Supply Rail up to 100 A (8/20 ms)
• These Devices are Pb−Free and are RoHS Compliant
APPLICATION DIAGRAM
Vcc (1)
http://onsemi.com
UDFN−6
D4 SUFFIX
CASE 517CS
BLOCK DIAGRAM
IO1 IO2 IO3 Vcc
CH1 (2)
High−Speed
Data Lines
CH2 (3)
CH3 (4)
DAP**
**Die Attach Pad on
back of package
(connect to ground)
GND (6)
GND (5)
MARKING DIAGRAM
AD M
1G
AD = Specific Device Code
M = Date Code
G = Pb−Free Package
ORDERING INFORMATION
Device
ESD7124MUTBG
Package
UDFN−6
(Pb−Free)
Shipping†
3000/Tape &
Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2014
August, 2014 − Rev. 0
1
Publication Order Number:
ESD7124/D
1 page  
ESD7124
PACKAGE DIMENSIONS
D AB
PIN ONE
REFERENCE
ÍÍÍ2X 0.10 C
ÍÍÍÍÍÍ2X 0.10 C TOP VIEW
E
UDFN6, 1.8x2, 0.4P
CASE 517CS
ISSUE O
ÇÇÉÇÇÉEXPOSED Cu
MOLD CMPD
DETAIL B
ALTERNATE
CONSTRUCTION
LL
0.05 C
6X
0.05 C
NOTE 4
DETAIL B
A3
A1
SIDE VIEW
L1
A
C
SEATING
PLANE
DETAIL A
ALTERNATE
CONSTRUCTIONS
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED TERMINALS
AND IS MEASURED BETWEEN 0.15 AND 0.30mm
FROM THE TERMINAL TIP.
4. COPLANARITY APPLIES TO THE EXPOSED PAD
AS WELL AS THE TERMINALS.
MILLIMETERS
DIM MIN MAX
A 0.45 0.55
A1 0.00 0.05
A3 0.125 REF
b 0.15 0.25
D 1.80 BSC
D2 0.35 0.55
E 2.00 BSC
E2 0.74 0.94
e 0.40 BSC
e1 0.80 BSC
e2 0.95 BSC
L 0.20 0.40
L1 --- 0.15
DETAIL A 2X D2
1
0.10 C
4
2X E2
e/2 RECOMMENDED
e MOUNTING FOOTPRINT*
6X b
0.95
14
0.07 C A B
0.40
0.05 C NOTE 3
PITCH
2X 0.55
6X
0.48
6X L
65
e1/2
e1
BOTTOM VIEW
0.10 C
65
e2
SUPPLEMENTAL
BOTTOM VIEW
PACKAGE
OUTLINE
2X
0.94 2.20
6X 0.25
0.40
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks,
copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC
reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any
particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without
limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications
and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC
does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for
surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where
personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and
its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly,
any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture
of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
Literature Distribution Center for ON Semiconductor
P.O. Box 5163, Denver, Colorado 80217 USA
Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada
Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada
Email: [email protected]
N. American Technical Support: 800−282−9855 Toll Free
USA/Canada
Europe, Middle East and Africa Technical Support:
Phone: 421 33 790 2910
Japan Customer Focus Center
Phone: 81−3−5817−1050
ON Semiconductor Website: www.onsemi.com
Order Literature: http://www.onsemi.com/orderlit
For additional information, please contact your local
Sales Representative
http://onsemi.com
5
ESD7124/D
5 Page | ||
| Páginas | Total 5 Páginas | |
| PDF Descargar | [ Datasheet ESD7124.PDF ] | |
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