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PDF STM32F102R8 Data sheet ( Hoja de datos )
| Número de pieza | STM32F102R8 | |
| Descripción | 32-bit MCU | |
| Fabricantes | STMicroelectronics | |
| Logotipo |  |
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STM32F102x8
STM32F102xB
Medium-density USB access line, ARM®-based 32-bit MCU with
64/128KB Flash, USB FS, 6 timers, ADC & 8 com. interfaces
Datasheet - production data
Features
Core: ARM® 32-bit Cortex®-M3 CPU
– 48 MHz maximum frequency,
1.25 DMIPS/MHz (Dhrystone 2.1)
performance at 0 WS memory access
– Single-cycle multiplication and hardware
division
Memories
– 64 or 128 Kbytes of Flash memory
– 10 or 16 Kbytes of SRAM
Clock, reset and supply management
– 2.0 to 3.6 V application supply and I/Os
– POR, PDR and programmable voltage
detector (PVD)
– 4-to-16 MHz crystal oscillator
– Internal 8 MHz factory-trimmed RC
– Internal 40 kHz RC
– PLL for CPU clock
– 32 kHz oscillator for RTC with calibration
Low power
– Sleep, Stop and Standby modes
– VBAT supply for RTC and backup registers
Debug mode
– Serial wire debug (SWD) and JTAG
interfaces
DMA
– 7-channel DMA controller
– Peripherals supported: timers, ADC, SPIs,
I2Cs and USARTs
1 × 12-bit, 1.2 µs A/D converter (up to 16
channels)
– Conversion range: 0 to 3.6 V
– Temperature sensor
Up to 51 fast I/O ports
– 37/51 I/Os all mappable on 16 external
interrupt vectors and almost all 5 V-tolerant
LQFP64
10 × 10 mm
LQFP48
7 × 7 mm
Up to 6 timers
– Three 16-bit timers, each with up to 4
IC/OC/PWM or pulse counter
– 2 watchdog timers (Independent and
Window)
– SysTick timer: 24-bit downcounter
Up to 8 communication interfaces
– Up to 2 x I2C interfaces (SMBus/PMBus)
– Up to 3 USARTs (ISO 7816 interface, LIN,
IrDA capability, modem control)
– Up to 2 SPIs (12 Mbit/s)
– One USB 2.0 full speed interface
CRC calculation unit, 96-bit unique ID
ECOPACK® packages
Table 1. Device summary
Reference
Part number
STM32F102x8 STM32F102C8, STM32F102R8
STM32F102xB STM32F102CB, STM32F102RB
June 2015
This is information on a product in full production.
DocID15056 Rev 6
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www.st.com
1 page  
STM32F102x8, STM32F102xB
List of tables
Table 45.
Table 46.
Table 47.
Table 48.
Table 49.
Table 50.
Table 51.
Table 52.
Table 53.
Table 54.
ADC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
RAIN max for fADC = 12 MHz . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
ADC accuracy - limited test conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
ADC accuracy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
TS characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
LQFP64 - 64-pin, 10 x 10 mm low-profile quad flat
package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
LQFP48 - 48-pin, 7 x 7 mm low-profile quad flat package
mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72
Package thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
Ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76
Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77
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Description
STM32F102x8, STM32F102xB
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DL E
1. For the USB function to be available, both HSE and PLL must be enabled, with the USB clock output
(USBCLK) at 48 MHz.
2. To have an ADC conversion time of 1.2 µs, APB2 must be at 12 MHz, 24 MHz or 48 MHz.
3. The Flash memory programming interface clock (FLITFCLK) is always the HSI clock.
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| PDF Descargar | [ Datasheet STM32F102R8.PDF ] | |
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