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PDF MT9M015 Data sheet ( Hoja de datos )

Número de pieza MT9M015
Descripción 1/5-Inch 1.3Mp CMOS Digital Image Sensor
Fabricantes Aptina Imaging Corporation 
Logotipo Aptina Imaging Corporation Logotipo



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Aptina Confidential and Proprietary
MT9M015: 1/5-Inch 1.3Mp CMOS Digital Image Sensor
Features
1/5-Inch 1.3Mp CMOS Digital Image Sensor
MT9M015 Data Sheet
For the latest MT9M015 data sheet, refer to Aptina’s Web site at www.aptina.com
Features
• Low dark current
• Simple two-wire serial interface
• Auto black level calibration
• Support for external LED or Xenon flash
• High frame rate preview mode with arbitrary down-
size scaling from maximum resolution
• Programmable controls: gain, frame size/rate,
exposure, left–right and top–bottom image reversal,
window size, and panning
• SMIA-compatible
• Data interface: CCP2-compliant sub-low-voltage
differential signalling (sub-LVDS)
• On-chip phase-locked loop (PLL) oscillator
• Bayer pattern downsize scaler
• Superior low-light performance
Applications
• Cellular phones
• Digital still cameras
• PC cameras
• PDAs
General Description
The Aptina® MT9M015 is a 1/5-inch SXGA-format
CMOS active-pixel digital image sensor with a pixel
array of 1280H x 1024V (1288H x 1032V including bor-
der pixels). It incorporates sophisticated on-chip cam-
era functions such as windowing, mirroring, column
and row skip modes, and snapshot mode. It is pro-
grammable through a simple two-wire serial interface
and has very low power consumption.
The MT9M015 digital image sensor features Aptina’s
breakthrough low-noise CMOS imaging technology
that achieves near-CCD image quality (based on sig-
nal-to-noise ratio and low-light sensitivity) while
maintaining the inherent size, cost, and integration
advantages of CMOS.
Table 1:
Key Performance Parameters
Parameter
Value
Optical format
Active imager size
Active pixels
Pixel size
Color filter array
Shutter type
Maximum data rate/
master clock
Frame
rate
SXGA
(1280 x 1024)
VGA
(640 x 480)
ADC resolution
Responsivity
Dynamic range
SNRMAX
Supply
voltage
Analog
Digital
Power consumption
Operating temperature
Packaging
Chief Ray Angle
1/5-inch SXGA (5:4)
2.83mm(H) x 2.27(V)
3.63mm diagonal
(calculated from 1288 x 1032)
1288H x 1032V
2.2 x 2.2μm
RGB Bayer pattern
Electronic rolling shutter (ERS)
64 Mp/s at 64 MHz system clock
Programmable up to 30 fps
Programmable up to 60 fps
10-bit, on-chip (61dB)
1.7 V/lux-sec
68.4 dB
35.3 dB
2.6 – 3.1V (2.80V nominal)
1.7 – 1.9V (1.80V nominal)
190mW
–30°C to +70°C
Die
24.5° at 85% image height
When operated in its default mode, the sensor gener-
ates a SXGA image at 30 frames per second (fps). An
on-chip analog-to-digital converter (ADC) generates a
10-bit value for each pixel.
Ordering Information
Table 2:
Available Part Numbers
Part Number
Description
MT9M015D00STCC14EC1
MT9M015IA9STCD ES
MT9M015IA9STCH ES
Bare die
Demo Kit
Head Board
PDF: 8873832500/Source: 1997842168
MT9M015_DS - Rev. D Pub. 8/11 EN
1.
©2010 Aptina Imaging Corporation All rights reserved.
.

1 page




MT9M015 pdf
Aptina Confidential and Proprietary
MT9M015: 1/5-Inch 1.3Mp CMOS Digital Image Sensor
List of Tables
List of Tables
Table 1:
Table 2:
Table 3:
Table 4:
Table 5:
Table 6:
Table 7:
Table 8:
Table 9:
Table 10:
Table 11:
Table 12:
Table 13:
Table 14:
Table 15:
Table 16:
Table 17:
Table 18:
Table 19:
Table 20:
Table 21:
Table 22:
Key Performance Parameters. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1
Available Part Numbers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1
Signal Descriptions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
Definitions for Programming Rules . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14
Programming Rules . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14
PLL in System States . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21
Signal State During Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .23
Streaming/STANDBY. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .23
Valid Divisor Combinations (10 bits per pixel). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .25
Valid Divisor Combinations (8 bits per pixel). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .25
Default Settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .28
Row Address Sequencing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .32
Frame Rates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .33
Test Patterns . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .38
Electrical Characteristics (EXTCLK) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .46
Two-Wire Serial Register Interface Electrical Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .47
Electrical Characteristics (Serial Pixel Data Interface) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .48
AC Electrical Characteristics (Control Interface) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .48
Power-On Reset Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .49
DC Electrical Definitions and Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .50
Electrical Characteristics (FLASH) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .50
Absolute Maximum Values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .51
PDF: 8873832500/Source: 1997842168
MT9M015_DS - Rev. D Pub. 8/11 EN
5 ©2010 Aptina Imaging Corporation. All rights reserved.

5 Page





MT9M015 arduino
Aptina Confidential and Proprietary
MT9M015: 1/5-Inch 1.3Mp CMOS Digital Image Sensor
Two-Wire Serial Register Interface
Single READ from Random Location
This sequence (Figure 3 on page 11) starts with a dummy WRITE to the 16-bit address
that is to be used for the READ. The master terminates the WRITE by generating a restart
condition. The master then sends the 8-bit read slave address/data direction byte and
clocks out one byte of register data. The master terminates the READ by generating a no-
acknowledge bit followed by a stop condition. Figure 3 shows how the internal register
address maintained by the MT9M015 is loaded and incremented as the sequence
proceeds.
Figure 3:
Single READ from Random Location
Previous Reg Address, N
Reg Address, M
M+1
S Slave Address 0 A Reg Address[15:8] A Reg Address[7:0] A Sr Slave Address 1 A Read Data A P
S = start condition
P = stop condition
Sr = restart condition
A = acknowledge
A = no-acknowledge
slave to master
master to slave
Single READ from Current Location
This sequence (Figure 4) performs a read using the current value of the MT9M015
internal register address. The master terminates the READ by generating a no-acknowl-
edge bit followed by a stop condition. The figure shows two independent READ
sequences.
Figure 4:
Single READ from Current Location
Previous Reg Address, N
S Slave Address 1 A Read Data A P
Reg Address, N+1
N+2
S Slave Address 1 A Read Data A P
PDF: 8873832500/Source: 1997842168
MT9M015_DS - Rev. D Pub. 8/11 EN
11
©2010 Aptina Imaging Corporation. All rights reserved.

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