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PDF MBI6034 Data sheet ( Hoja de datos )

Número de pieza MBI6034
Descripción PWM-Embedded 3x4-Channel Constant-Current Sink Driver
Fabricantes Macroblock 
Logotipo Macroblock Logotipo



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Macroblock
Preliminary Datasheet
MBI6034
PWM-Embedded 3x4-Channel Constant-Current
Sink Driver with Error Detection for LED Strips
Features
Supply voltage
- 6V~24V by internal LDO
Shrink SOP
- 3.3V/5V direct input
3x4-channel constant-current sink driver for LED strips
- Constant current range:
3~45mA @ VDD=6 ~24V or VDD=VCA=5V
3~30mA @ VDD=VCA=3.3V
- 3 groups of current gain
- Sustaining voltage at output channels: 28V (max.)
Embedded 16-bit PWM generator
- Gray scale clock generated by the embedded oscillator
GP: SSOP24L-150-0.64
- 16-bit S-PWM patented technology
Reliable data transmission
Thin Shrink SOP
- Daisy-chain topology
- Two-wire transmission interface
- Phase-inversed output clock
- Built-in buffer for long distance transmission
Error detection
- LED open
GTS: TSSOP24L-173-0.65
- LED short
- CKI/SDI disconnection
Quad Flat No-Lead
- Bi-directional transmission to read back error status
RoHS-compliant packages
- SSOP-24
- TSSOP-24
- QFN-24
GFN: QFN24L-4*4-0.5
Application
LED strips
Mesh display
Architectural lighting
Macroblock, Inc. 2014
6F-4, No.18, Pu-Ting Rd., Hsinchu, Taiwan 30072, R.O.C.
TEL: +886-3-579-0068, FAX: +886-3-579-7534, E-mail: [email protected]
- 1 - May 2014, V1.01

1 page




MBI6034 pdf
MBI6034
Block Diagram
PWM-Embedded 3x4-Channel Constant-Current
Sink Driver with Error Detection for LED Strips
OUTA0 OUTB0 OUTC0 OUTA1
OUTC3
R-EXT
IOA Regulator
IOB Regulator
IOC Regulator
Frequency
Divider
Oscillator
DIR_FLAG
Control
Logic
PWM
Counter
GCLK
16
Current Setting
&7-bit Current Gain
Buffers
16
SDI
CKI
Decoder & Data Dispatcher
Shift Register
SDO
CKO
- 5 - May 2014, V1.01

5 Page





MBI6034 arduino
MBI6034
PWM-Embedded 3x4-Channel Constant-Current
Sink Driver with Error Detection for LED Strips
Switching Characteristics (VDD=VCA=3.3V, Ta=25°C)
Characteristic
Symb
ol
Condition
Min.
CKI-CKO
tP1 18
CKO-SDO
tP2 20
CKO-SDI
tP5 20
Propagatio
n delay
CKO-DIR_FLAG
GCLKOUTA0 , OUTA1 , OUTA2 , OUTA3 ↓↑
GCLKOUTB0 , OUTB1, OUTB2, OUTB3↓↑
tP6 Rext=680
tP7 RL =200
tP8
10
32
40
time
(“H” to ”L”
or “L” to
“H”)
GCLKOUTC0, OUTC1, OUTC2 , OUTC3 ↓↑
SDI(n+1) – SDO(n)
tP9 48
Wire delay
tP3
and IC
internal
wd*
delay
Wire delay
CKI(n) – CKI(n+1)
tP4
and IC
internal
tP1+
wd*
delay
Rise Time
CKO/SDO/SDI
OUTA ~ OUTC
tCR 2
tOR1 25
Fall Time
CKO/SDO/SDI
OUTA ~ OUTC
tCF Rext=680
tOF1 RL =200
2
25
Hold Time SDI-CKI
tH(D)
10
Setup Time CKI-SDI
tS (D)
10
Pulse width
CKI(WM)
Pulse Width
tW (WM)
of write
mode
Pulse width
15
CKI(RM)
tW (RM) of read
mode
50
Flat(AWG2
CKI(WM)
FCKI
6) /CAT6
wire, 50cm
0.2
distance
Frequency
Flat(AWG2
CKI(RM)
FCKI 6), 50cm
distance
0.2
PWM clock
Internal oscillator
FPCKL - 9.0
- - 9.0
Timeout period**
error detection operation time****
ttimeout
tERR-C
18.6
2
Typ.
23
30
30
20
40
48
56
wd*
tP1+
wd*
5
35
5
35
-
-
-
-
-
-
11.0
11.0
-
-
Max.
28
40
40
30
48
56
64
wd*
tP1+
wd*
8
45
8
45
-
-
-
-
10
3
13.0
13.0
-
-
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
MHz
MHz
MHz
MHz
us
us
Note:
* wd: is wire delay , which is dependent on wire distance and wire material.
**The period of internal OSC is 9MHz (min.) ~ 13MHz (max.), so the time-out period is 168x76.9ns (12.9us) ~
168x111.1ns (18.6us). Please refer to time out mechanism section.
***The Gray Scale Clock Frequency is 13MHz (max.) when the GCLK=frequency of internal oscillator.
****Users have to leave more time than the maximum error detection time for the error detection.
*****The maximum frequency may be limited by different application conditions. Please refer to the application note
for details.
- 11 -
May 2014, V1.01

11 Page







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