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PDF FDMS8320LDC Data sheet ( Hoja de datos )
| Número de pieza | FDMS8320LDC | |
| Descripción | N-Channel Dual Cool Power Trench MOSFET | |
| Fabricantes | Fairchild Semiconductor | |
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October 2012
FDMS8320LDC
N-Channel Dual CoolTM Power Trench® MOSFET
40 V, 130 A, 1.1 mΩ
Features
Max rDS(on) = 1.1 mΩ at VGS = 10 V, ID = 44 A
Max rDS(on) = 1.5 mΩ at VGS = 4.5 V, ID = 37 A
Advanced Package and Silicon combination for low rDS(on)
and high efficiency
Next generation enhanced body diode technology,
engineered for soft recovery
MSL1 robust package design
100% UIL tested
RoHS Compliant
General Description
This N-Channel MOSFET is produced using Fairchild
Semiconductor’s advanced Power Trench® process.
Advancements in both silicon and Dual CoolTM package
technologies have been combined to offer the lowest rDS(on)
while maintaining excellent switching performance by extremely
low Junction-to-Ambient thermal resistance.
Applications
OringFET / Load Switching
Synchronous Rectification
DC-DC Conversion
Pin 1
S
D
D
D
D
S
S
D
D
G
S
S
S
Pin 1
S
G
Top
Power 56
Bottom
D
D
MOSFET Maximum Ratings TA = 25 °C unless otherwise noted
Symbol
VDS
VGS
ID
EAS
PD
TJ, TSTG
Parameter
Drain to Source Voltage
Gate to Source Voltage
Drain Current -Continuous
-Continuous
-Pulsed
TC = 25 °C
TA = 25 °C
Single Pulse Avalanche Energy
Power Dissipation
TC = 25 °C
Power Dissipation
TA = 25 °C
Operating and Storage Junction Temperature Range
Thermal Characteristics
(Note 1a)
(Note 4)
(Note 3)
(Note 1a)
Ratings
40
±20
130
44
300
661
125
3.2
-55 to +150
Units
V
V
A
mJ
W
°C
RθJC
RθJC
RθJA
RθJA
RθJA
RθJA
RθJA
Thermal Resistance, Junction to Case
Thermal Resistance, Junction to Case
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
Package Marking and Ordering Information
Device Marking
8320L
Device
FDMS8320LDC
Package
Dual CoolTM Power 56
(Top Source)
(Bottom Drain)
(Note 1a)
(Note 1b)
(Note 1i)
(Note 1j)
(Note 1k)
2.9
1.0
38
81
16
23
11
Reel Size
13 ’’
Tape Width
12 mm
°C/W
Quantity
3000 units
©2012 Fairchild Semiconductor Corporation
FDMS8320LDC Rev. C
1
www.fairchildsemi.com
1 page  
Typical Characteristics TJ = 25 °C unless otherwise noted
10
ID = 44 A
8
6
4
2
VDD = 15 V
VDD = 20 V
VDD = 25 V
0
0 26 52 78 104
Qg, GATE CHARGE (nC)
130
10000
1000
Ciss
Coss
100
f = 1 MHz
VGS = 0 V
10
0.1
1
10
VDS, DRAIN TO SOURCE VOLTAGE (V)
Crss
40
Figure 7. Gate Charge Characteristics
Figure8. CapacitancevsDrain
to Source Voltage
200 300
100
240
TJ = 25 oC
180
TJ = 100 oC
10 120
RθJC = 1.0 oC/W
VGS = 10 V
TJ = 125 oC
Limited by Package
60
VGS = 4.5 V
1
0.001
0.01 0.1 1 10 100
tAV, TIME IN AVALANCHE (ms)
Figure9. Unclamped Inductive
Switching Capability
1000
500
100 100 us
10
THIS AREA IS
1 LIMITED BY rDS(on)
SINGLE PULSE
0.1 TJ = MAX RATED
RθJA = 81 oC/W
TA = 25 oC
0.01
0.01 0.1
CURVE BENT TO
MEASURED DATA
1 10
1 ms
10 ms
100 ms
1s
10 s
DC
100200
VDS, DRAIN to SOURCE VOLTAGE (V)
Figure 11. Forward Bias Safe
Operating Area
0
25 50 75 100 125
TC, CASE TEMPERATURE (oC)
Figure 10. Maximum Continuous Drain
Current vs Case Temperature
150
5000
1000
100
SINGLE PULSE
RθJA = 81 oC/W
TA = 25 oC
10
1
0.1
10-4 10-3 10-2 10-1
1
10
t, PULSE WIDTH (sec)
100 1000
Figure 12. Single Pulse Maximum
Power Dissipation
©2012 Fairchild Semiconductor Corporation
FDMS8320LDC Rev. C
5
www.fairchildsemi.com
5 Page | ||
| Páginas | Total 8 Páginas | |
| PDF Descargar | [ Datasheet FDMS8320LDC.PDF ] | |
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