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Número de pieza | NCV4290 | |
Descripción | 450mA Low Drop Voltage Regulator | |
Fabricantes | ON Semiconductor | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de NCV4290 (archivo pdf) en la parte inferior de esta página. Total 15 Páginas | ||
No Preview Available ! NCV4290
5.0 V, 450 mA Low-Dropout
Voltage Regulator with
Power Good
The NCV4290 is an integrated low dropout regulator designed
for use in harsh automotive environments. It includes wide
operating temperature and input voltage ranges. The output is
regulated at 5.0 V and is rated to 450 mA of output current. It also
provides a number of features, including overcurrent protection,
overtemperature protection and a programmable microprocessor
power good signal. The NCV4290 is available in the DPAK and
D2PAK surface mount packages. The output is stable over a wide
output capacitance and ESR range.
Features
• 5.0 V, ±2% Output Voltage Options
• 450 mA Output Current
• Very Low Current Consumption
• Active Power Good Output
• Power Good Low Down to VQ = 1.0 V
• 500 mV (max) Dropout Voltage
• Fault Protection
♦ +45 V Peak Transient Voltage
♦ −42 V Reverse Voltage
♦ Short Circuit Protection
♦ Thermal Overload Protection
• AEC−Q100 Qualified
• These are Pb−Free Devices
Applications
• Auto Body Electronics
I
Bandgap
Reference
Thermal
Shutdown
D
Error
Amplifier
+
−
Current Limit and
Saturation Sense
Power Good
Generator
Q
1
5
http://onsemi.com
MARKING
DIAGRAMS
DPAK, 5−PIN
DT SUFFIX
CASE 175AA
V4290xG
ALYWW
1
1
5
D2PAK, 5−PIN
DS SUFFIX
CASE 936A
NC
V4290x
AWLYWWG
1
x
A
WL, L
Y
WW
G
= 5 (5.0 V Output)
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
Pin 1. I
2. PG
Tab, 3. GND*
4. D
5. Q
* Tab is connected to
Pin 3 on all packages
ORDERING INFORMATION
See detailed ordering and shipping information in the
dimensions section on page 13 of this data sheet.
Figure 1. Block Diagram
© Semiconductor Components Industries, LLC, 2012
August, 2012 − Rev. 0
GND
PG
1
Publication Order Number:
NCV4290D
1 page NCV4290
TYPICAL PERFORMANCE CHARACTERISTICS
100 100
10 10
1
0.1
0.010
Stable Region
VI = 13.5 V
CQ = 22 mF
50 100 150 200 250 300 350 400 450
IQ, OUTPUT CURRENT (mA)
Figure 2. Output Stability with Output
Capacitor ESR
1
0.1
0.01
0
Stable Region
VI = 13.5 V
CQ = 1 mF
50 100 150 200 250 300 350 400
IQ, OUTPUT CURRENT (mA)
Figure 3. Output Stability with Output
Capacitor ESR
450
5.2
5.1 VI = 13.5 V, RL = 25 W
5.0
6.0
RL = 25 W, TJ = 25°C
5.0
4.0
3.0
2.0
4.9
1.0
4.−840
0 40 80 120
TJ, JUNCTION TEMPERATURE (°C)
160
Figure 4. Output Voltage VQ vs. Temperature TJ
0.0
0 2 4 6 8 10
VI, INPUT VOLTAGE (V)
Figure 5. Output Voltage VQ vs. Input Voltage VI
1.2
VI = 13.5 V
1.0
0.8
0.6
0.4
0.2
0.0
−40
0 40 80 120
TJ, JUNCTION TEMPERATURE (°C)
160
Figure 6. Output Current IQ vs. Temperature TJ
1.2
TJ = 25°C
1.0
0.8 TJ = 125°C
0.6
0.4
0.2
0.00 10 20 30 40 50
VI, INPUT VOLTAGE (V)
Figure 7. Output Current IQ vs. Input Voltage VI
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5
5 Page NCV4290
Table 2. D2PAK 5−Lead Thermal RC Network Models
Drain Copper Area (1 oz thick)
241 mm2
788 mm2
(SPICE Deck Format)
Cauer Network
241 mm2
788 mm2
C_C1 Junction Gnd
9.5070E−06
9.5071E−06
C_C2 node1
Gnd
3.7150E−05
3.7151E−05
C_C3 node2
Gnd
1.1261E−04
1.1262E−04
C_C4 node3
Gnd
6.6126E−04
6.6143E−04
Units
W−s/C
W−s/C
W−s/C
W−s/C
241 mm2
788 mm2
Foster Network
Tau Tau
1.000E−06
1.000E−06
1.000E−05
1.000E−05
1.000E−04
1.000E−04
4.893E−04
4.893E−04
Units
sec
sec
sec
sec
C_C5
C_C6
C_C7
C_C8
C_C9
C_C10
node4
node5
node6
node7
node8
node9
Gnd
Gnd
Gnd
Gnd
Gnd
Gnd
R_R1
R_R2
R_R3
R_R4
R_R5
R_R6
R_R7
R_R8
R_R9
R_R10
Junction
node1
node2
node3
node4
node5
node6
node7
node8
node9
node1
node2
node3
node4
node5
node6
node7
node8
node9
gnd
2.9986E−02
5.2806E−02
3.9578E−01
9.6950E−01
2.26
231.58
241 mm2
1.3476E−01
3.0817E−01
8.0361E−01
5.7370E−01
2.6250E−01
5.6022E−01
4.0655
38.4592
14.9707
2.5618E−01
3.0234E−02
5.4409E−02
4.6168E−01
1.66
37.44
4089.09
788 mm2
1.3476E−01
3.0817E−01
8.0355E−01
5.7346E−01
2.5833E−01
5.3623E−01
3.1454
42.3515
1.9244
1.6530E−02
W−s/C
W−s/C
W−s/C
W−s/C
W−s/C
W−s/C
C/W
C/W
C/W
C/W
C/W
C/W
C/W
C/W
C/W
C/W
4.770E−03
4.129E−02
1.294E+00
2.089E+01
5.824E+01
R’s
0.0803
0.1736
0.5491
0.9733
0.1096
0.5367
1.8971
2.9679
1.9498
4.770E−03
4.129E−02
1.294E+00
6.008E+01
7.069E+01
R’s
0.0803
0.1736
0.5491
0.9733
0.1096
0.5367
1.8971
2.9679
4.0572
sec
sec
sec
sec
sec
sec
C/W
C/W
C/W
C/W
C/W
C/W
C/W
C/W
C/W
C/W
NOTE: Bold face items represent the package without the external thermal system.
The Cauer networks generally have physical significance and may be divided between nodes to separate thermal behavior
due to one portion of the network from another. The Foster networks, though when sorted by time constant (as above) bear
a rough correlation with the Cauer networks, are really only convenient mathematical models. Cauer networks can be easily
implemented using circuit simulating tools, whereas Foster networks may be more easily implemented using mathematical
tools (for instance, in a spreadsheet program), according to the following formula:
n
SR(t) + i + 1 Ri ǒ1−e−tńtaui Ǔ
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11
11 Page |
Páginas | Total 15 Páginas | |
PDF Descargar | [ Datasheet NCV4290.PDF ] |
Número de pieza | Descripción | Fabricantes |
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