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PDF CY7C1011DV33 Data sheet ( Hoja de datos )
| Número de pieza | CY7C1011DV33 | |
| Descripción | 2-Mbit (128K x 16)Static RAM | |
| Fabricantes | Cypress Semiconductor | |
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CY7C1011DV33
2-Mbit (128 K × 16) Static RAM
2-Mbit (128 K × 16) Static RAM
Features
■ Pin-and function-compatible with CY7C1011CV33
■ High speed
❐ tAA = 10 ns
■ Low active power
❐ ICC = 90 mA @ 10 ns (Industrial)
■ Low CMOS standby power
❐ ISB2 = 10 mA
■ Data Retention at 2.0 V
■ Automatic power-down when deselected
■ Independent control of upper and lower bits
■ Easy memory expansion with CE and OE features
■ Available in Pb-free 44-pin TSOP II, and 48-ball VFBGA
Functional Description
The CY7C1011DV33[1] is a high-performance CMOS Static
RAM organized as 128 K words by 16 bits.
Writing to the device is accomplished by taking Chip Enable (CE)
and Write Enable (WE) inputs LOW. If Byte Low Enable (BLE) is
LOW, then data from I/O pins (I/O0 through I/O7), is written into
the location specified on the address pins (A0 through A16). If
Byte High Enable (BHE) is LOW, then data from I/O pins (I/O8
through I/O15) is written into the location specified on the address
pins (A0 through A16).
Reading from the device is accomplished by taking Chip Enable
(CE) and Output Enable (OE) LOW while forcing the Write
Enable (WE) HIGH. If Byte Low Enable (BLE) is LOW, then data
from the memory location specified by the address pins will
appear on I/O0 to I/O7. If Byte High Enable (BHE) is LOW, then
data from memory will appear on I/O8 to I/O15. See the truth table
at the back of this data sheet for a complete description of read
and write modes.
The input/output pins (I/O0 through I/O15) are placed in a
high-impedance state when the device is deselected (CE HIGH),
the outputs are disabled (OE HIGH), the BHE and BLE are
disabled (BHE, BLE HIGH), or during a write operation (CE LOW,
and WE LOW).
The CY7C1011DV33 is available in standard Pb-free 44-pin
TSOP II with center power and ground pinout, as well as 48-ball
very fine-pitch ball grid array (VFBGA) packages.
For a complete list of related resources, click here.
Logic Block Diagram
INPUT BUFFER
A0
A1
A2
AA34 128K X 16
A5
A6
AA78
I/O0–I/O7
I/O8–I/O15
COLUMN
DECODER
BHE
WE
CE
OE
BLE
Note
1. For guidelines on SRAM system design, please refer to the “System Design Guidelines” Cypress application note, available on the internet at www.cypress.com
Cypress Semiconductor Corporation • 198 Champion Court
Document Number: 38-05609 Rev. *H
• San Jose, CA 95134-1709 • 408-943-2600
Revised November 12, 2014
1 page  
CY7C1011DV33
Capacitance
Parameter [4]
Description
CIN
COUT
Input capacitance
I/O capacitance
Thermal Resistance
Parameter [4]
Description
JA Thermal resistance
(junction to ambient)
JC Thermal resistance
(junction to case)
Test Conditions
TA = 25 C, f = 1 MHz, VCC = 3.3 V
Max Unit
8 pF
8 pF
Test Conditions
Still air, soldered on a 3 × 4.5 inch,
four-layer printed circuit board
TSOP II
50.66
17.17
VFBGA
27.89
14.74
Unit
C/W
C/W
AC Test Loads and Waveforms
Figure 3. AC Test Loads and Waveforms [5]
OUTPUT
Z = 50
* CAPACITIVE LOAD CONSISTS
OF ALL COMPONENTS OF THE
TEST ENVIRONMENT
50
1.5 V
(a)
High Z characteristics:
3.3 V
R 317
OUTPUT
5 pF
R2
351
3.0 V
30 pF* GND
ALL INPUT PULSES
90%
90%
10%
10%
Rise Time: 1 V/ns
Fall Time: 1 V/ns
(b)
(c)
Note
4. Tested initially and after any design or process changes that may affect these parameters.
5. AC characteristics (except high Z) are tested using the load conditions shown in (a). High Z characteristics are tested for all speeds using the test load shown in (c).
Document Number: 38-05609 Rev. *H
Page 5 of 17
5 Page 
CY7C1011DV33
Truth Table
CE OE WE
HXX
L LH
L LH
L LH
LXL
LXL
LXL
L HH
BLE
X
L
L
H
L
L
H
X
BHE
I/O0–I/O7
X High Z
L Data Out
H Data Out
L High Z
L Data In
H Data In
L High Z
X High Z
I/O8–I/O15
High Z
Data Out
High Z
Data Out
Data In
High Z
Data In
High Z
Mode
Power-down
Read all bits
Read lower bits only
Read upper bits only
Write all bits
Write lower bits only
Write upper bits only
Selected, outputs disabled
Power
Standby (ISB)
Active (ICC)
Active (ICC)
Active (ICC)
Active (ICC)
Active (ICC)
Active (ICC)
Active (ICC)
Document Number: 38-05609 Rev. *H
Page 11 of 17
11 Page | ||
| Páginas | Total 17 Páginas | |
| PDF Descargar | [ Datasheet CY7C1011DV33.PDF ] | |
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