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PDF TMP93CW46AF Data sheet ( Hoja de datos )
| Número de pieza | TMP93CW46AF | |
| Descripción | CMOS 16-Bit Microcontroller | |
| Fabricantes | Toshiba Semiconductor | |
| Logotipo |  |
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Low Voltage/Low Power
CMOS 16-Bit Microcontroller
TMP93CW46AF
TMP93CW46A
1. Outline and Device Characteristics
The TMP93CW46AF is high-speed advanced 16-bit microcontroller to enable low voltage and
low power consumption operation. The TMP93CW46AF is housed in 100-pin mini flat package.
The device characteristics are as follows:
(1) Original 16-bit CPU (900/L CPU)
• TLCS-90 instruction mnemonic upward compatible
• 16-Mbyte linear address space
• General-purpose registers and register bank system
• 16-bit multiplication/division and bit transfer/arithmetic instructions
• Micro DMA: 4 channels (1.6 µs/2 bytes at 20 MHz)
(2) Minimum instruction execution time: 200 ns at 20 MHz
(3) Internal RAM: 4 Kbytes
Internal ROM: 128 Kbytes
(4) External memory expansion
• Can be expanded up to 16 Mbytes (for both programs and data).
• Can mix 8- and 16-bit external data buses.
…Dynamic data bus sizing
(5) 8-bit timer: 2 channels
(6) 8-bit PWM timer: 2 channels
(7) 16-bit timer: 2 channels
(8) Serial interface: 5 channels
• UART/synchronous modes: 4 channels
• UART mode: 1 channel
(9) 10-bit AD converter: 8 channels
030619EBP1
• The information contained herein is subject to change without notice.
• The information contained herein is presented only as a guide for the applications of our products. No responsibility is assumed by
TOSHIBA for any infringements of patents or other rights of the third parties which may result from its use. No license is granted by
implication or otherwise under any patent or patent rights of TOSHIBA or others.
• TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor devices in general
can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. It is the responsibility of the buyer,
when utilizing TOSHIBA products, to comply with the standards of safety in making a safe design for the entire system, and to avoid
situations in which a malfunction or failure of such TOSHIBA products could cause loss of human life, bodily injury or damage to
property.
In developing your designs, please ensure that TOSHIBA products are used within specified operating ranges as set forth in the most
recent TOSHIBA products specifications. Also, please keep in mind the precautions and conditions set forth in the “Handling Guide for
Semiconductor Devices,” or “TOSHIBA Semiconductor Reliability Handbook” etc..
• The TOSHIBA products listed in this document are intended for usage in general electronics applications (computer, personal
equipment, office equipment, measuring equipment, industrial robotics, domestic appliances, etc.). These TOSHIBA products are
neither intended nor warranted for usage in equipment that requires extraordinarily high quality and/or reliability or a malfunctionor
failure of which may cause loss of human life or bodily injury (“Unintended Usage”). Unintended Usage include atomic energy control
instruments, airplane or spaceship instruments, transportation instruments, traffic signal instruments, combustion control instruments,
medical instruments, all types of safety devices, etc.. Unintended Usage of TOSHIBA products listed in this document shall be made
at the customer’s own risk.
• The products described in this document are subject to the foreign exchange and foreign trade laws.
• TOSHIBA products should not be embedded to the downstream products which are prohibited to be produced and sold, under any law
and regulations.
• For a discussion of how the reliability of microcontrollers can be predicted, please refer to Section 1.3 of the chapter entitled Quality
and Reliability Assurance/Handling Precautions.
93CW46A-1
2004-02-10
1 page  
TMP93CW46A
2.2 Pin Names and Functions
The names of input/output pins and their functions are described below.
Table 2.2.1 to Table 2.2.4 show pin names and functions.
Pin Names
P00 to P07
AD0 to AD7
P10 to P17
AD8 to AD15
A8 to A15
P20 to P27
Number
of Pins
8
8
8
A0 to A7
A16 to A23
P30
RD
P31
WR
P32
HWR
P33
WAIT
P34
BUSRQ
1
1
1
1
1
P35
BUSAK
1
P36
R/ W
P37
RAS
P40
CS0
CAS0
1
1
1
Table 2.2.1 Pin Names and Functions (1/4)
I/O Functions
I/O
3 states
I/O
3 states
Output
I/O
Output
Output
Output
Output
Output
Output
I/O
Output
I/O
Input
I/O
Input
I/O
Output
I/O
Output
I/O
Output
I/O
Output
Output
Port 0: I/O port that allows selection of I/O on a bit basis
Address/Data (Lower): Bits 0 to 7 of address/data bus
Port 1: I/O port that allows selection of I/O on a bit basis
Address data (Upper): Bits 8 to 15 of address/data bus
Address: 8 to 15 of address bus
Port 2: I/O port that allows selection of I/O on a bit basis
(with pull-down resistor)
Address: Bits 0 to 7 of address bus
Address: Bits 16 to 23 of address bus
Port 30: Output port
Read: Strobe signal for reading external memory
Port 31: Output port
Write: Strobe signal for writing data on pins AD0 to AD7
Port 32: I/O port (with pull-up resistor)
High write: Strobe signal for writing data on pins AD8 to AD15
Port 33: I/O port (with pull-up resistor)
Wait: Pin used to request CPU bus wait
Port34: I/O port (with pull-up resistor)
Bus request: Signal used to request high impedance for AD0 to AD15, A0 to A23, RD ,
WR , HWR , R/ W , RAS , CS0 , CS1 , and CS2 pins.
(For external DMAC)
Port 35: I/O port (with pull-up resistor)
Bus acknowledge: Signal indicating that AD0 to AD15, A0 to A23, RD , WR , HWR ,
R/ W , RAS , CS0 , CS1 , and CS2 pins are at high impedance after receiving BUSRQ.
(For external DMAC)
Port 36: I/O port (with pull-up resistor)
Read/Write: 1 represents read or dummy cycle.
0 represents write cycle.
Port 37: I/O port (with pull-up resistor)
Row address strobe: Outputs RAS strobe for DRAM.
Port 40: I/O port (with pull-up resistor)
Chip select 0: Outputs 0 when address is within specified address area.
Column address strobe 0: Outputs CAS strobe for DRAM when address is within
specified address area.
Note: This device’s built-in memory or built-in I/O cannot be accessed with the external DMA controller,
using the BUSRQ and BUSAK signals.
93CW46A-5
2004-02-10
5 Page 
3.2 Memory Map
Figure 3.2.1 is a memory map of the TMP93CW46A.
000000H
000080H
Internal I/O
(128 bytes)
256-byte direct
area (n)
000100H
001080H
Internal RAM
(4 Kbytes)
External memory
64-Kbyte area
(nn)
TMP93CW46A
008000H
008100H
010000H
Interrupt vector table area
(64 entries × 4 bytes)
128-Kbyte internal ROM
028000H
External memory
16-MByte area
(R)
(−R)
(R +)
(R + R8/16)
(R + d8/16)
(nnn)
FFFF00H
FFFFFFH
Reserved (256 bytes)
( = Internal area)
Note: The 256-byte area from FFFF00H to FFFFFFH can not be used.
Figure 3.2.1 Memory Map
93CW46A-11
2004-02-10
11 Page | ||
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