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PDF TMP93CM41F Data sheet ( Hoja de datos )
| Número de pieza | TMP93CM41F | |
| Descripción | CMOS 16-Bit Microcontroller | |
| Fabricantes | Toshiba Semiconductor | |
| Logotipo |  |
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TOSHIBA
TLCS-900 Series
TMP93CM40/TMP93CM41
Low Voltage/Low Power
CMOS 16-bit Microcontrollers
TMP93CM40F/TMP93CM41F
1. Outline and Device Characteristics
TMP93CM40/M41 are high-speed advanced 16-bit microcon-
trollers developed for controlling medium to large-scale equip-
ment. The TMP93CM41 does not have a ROM, the
TMP96CM40 has a built-in ROM. Otherwise, the devices func-
tion in the same way.
TMP93CM40F/TMP93CM41F are housed in 100-pin
mini flat package. Device characteristics are as follows:
(1) Original 16-bit CPU (900L CPU)
• TLCS-90 instruction mnemonic upward compatible.
• 16M-byte linear address space
• General-purpose registers and register bank system
• 16-bit multiplication/division and bit transfer/arithmetic
instructions
• High-speed micro DMA
- 4 channels (1.6 µs/2 bytes at 20MHz)
(2) Minimum instruction execution time
- 200ns at 20MHz
(3) Internal RAM: 2K byte
Internal ROM:
TMP93CM40
32K-byte ROM
TMP93CM41
None
(4) External memory expansion
• Can be expanded up to 16M bytes (for both programs and
data).
• AM8/16 pin (select the external data bus width).
• Can mix 8- and 16-bit external data buses.
…Dynamic data bus sizing
(5) 8-bit timer: 2 channels
(6) 8-bit PWM timer: 2 channels
(7) 16-bit timer: 2 channels
(8) Pattern generator: 4 bits, 2 channels
(9) Serial interface: 2 channels
(10) 10-bit A/D converter: 4 channels
(11) Watchdog timer
(12) Chip select/wait controller: 3 blocks
(13) Interrupt functions
• 2 CPU interrupts… …SWI instruction, and Illegal instruction
• 14 internal interrupts 7-level priority can be set.
• 6 external interrupts
(14) I/O ports:
79 pins for TMP93CM40 and 61 pins for TMP93CM41
(15) Standby function : 4 halt modes (RUN, IDLE2, IDLE1,
STOP)
(16) Clock Gear Function
• High-frequency clock can be changed fc to fc/16
• Dual clock operation
(17) Wide Operating Voltage
• VCC = 2.7 to 5.5V
The information contained here is subject to change without notice.
The information contained herein is presented only as guide for the applications of our products. No responsibility is assumed by TOSHIBA for any infringements of patents or other rights of the third parties
which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of TOSHIBA or others. These TOSHIBA products are intended for usage in general electronic
equipments (office equipment, communication equipment, measuring equipment, domestic electrification, etc.) Please make sure that you consult with us before you use these TOSHIBA products in equip-
ments which require high quality and/or reliability, and in equipments which could have major impact to the welfare of human life (atomic energy control, spaceship, traffic signal, combustion control, all types
of safety devices, etc.). TOSHIBA cannot accept liability to any damage which may occur in case these TOSHIBA products were used in the mentioned equipments without prior consultation with TOSHIBA.
TOSHIBA CORPORATION
1
1 page  
TMP93CM40/TMP93CM41
Pin Name
P41
CS1
CAS1
P42
CS2
CAS2
P50 to P53
AN0 to AN3
VREF
AGND
P60 to P63
PG00 to PG03
P64 to P67
PG10 to PG13
P70
TI0
P71
T01
P72
T02
P73
T03
P80
TI4
INT4
P81
TI5
INT5
P82
TO4
P83
TO5
Number
of Pins
1
1
4
1
1
4
4
1
1
1
1
1
1
1
1
I/O
I/O
Output
Output
I/O
Output
Output
Input
Input
Input
Input
I/O
Output
I/O
Output
I/O
Input
I/O
Output
I/O
Output
I/O
Output
I/O
Input
Input
I/O
Input
Input
I/O
Output
I/O
Output
Functions
Port 41: I/O port (with pull-up resistor)
Chip select 1: Outputs 0 if address is within specified address area.
Column address strobe 1: Outputs CAS strobe for DRAM if address is within specified address area.
Port 42: I/O port (with pull-up resistor)
Chip select 2: Outputs 0 if address is within specified address area.
Column address strobe 2: Outputs CAS strobe for DRAM if address is within specified address area.
Port 5: Input port
Analog input: Input to A/D converter
Pin for reference voltage input to A/D converter
Ground pin for A/D converter
Ports 60 to 63: I/O ports that allow selection of I/O on a bit basis (with pull-up resistor)
Pattern generator ports: 00 to 03
Ports 64 to 67: I/O ports that allow selection of I/O on a bit basis (with pull-up resistor)
Pattern generator ports: 10 to 13
Port 70: I/O port (with pull-up resistor)
Timer input 0: Timer 0 input
Port 71: I/O port (with pull-up resistor)
Timer output 1: Timer 0 or 1 output
Port 72: I/O port (with pull-up resistor)
PWM output 2: 8-bit PWM timer 2 output
Port 73: I/O port (with pull-up resistor)
PWM output 3: 8-bit PWM timer 3 output
Port 80: I/O port (with pull-up resistor)
Timer input 4: Timer 4 count/capture trigger signal input
Interrupt request pin 4: Interrupt request pin with programmable rising/falling edge
Port 81: I/O port (with pull-up resistor)
Timer input 5: Timer 4 count/capture trigger signal input
Interrupt request pin 5: Interrupt request pin with rising edge
Port 82: I/O port (with pull-up resistor)
Timer output 4: Timer 4 output pin
Port 83: I/O port (with pull-up resistor)
Timer output 5: Timer 4 output pin
TOSHIBA CORPORATION
5
5 Page 
TMP93CM40/TMP93CM41
Figure 3.3.2. Block Diagram of Dual Clock, Standby Circuits
TOSHIBA CORPORATION
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| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet TMP93CM41F.PDF ] | |
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