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PDF SPFMPR302 Data sheet ( Hoja de datos )
| Número de pieza | SPFMPR302 | |
| Descripción | Plastic Fiber Optic Receiver | |
| Fabricantes | Avago | |
| Logotipo |  |
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SPF MPR3 02
Plastic Fiber Optic Receiver for MOST®
Data Sheet
Description
The 4-pin MOST Optical Receiver (MPR3 02) is a highly
integrated CMOS IC combined with a high speed PIN
- diode designed to receive up to 25Mbit/s optical data
which is bi-phase coded at up to 50Mbaud and convert
this optical data to a TTL compatible data stream.
This high performance, low cost, CMOS receiver consists
of a low noise transimpedance amplifier and comparator
in the data path. A timer circuit puts the part into a low
power mode if optical data is not received for 10µs (typ.).
During the low power mode, the PIN diode is still being
observed and if activity is detected, Bigfoot will resume
full power operation within 3.5ms (typ.).
A STATUS-pin indicates if modulated light is received
(Light on -> STATUS = low). With the STATUS-pin the
power supply of the whole MOST device can be switched
ON.
Features
Excellent solution for converting high speed data from
Plastic Optical Fiber (POF) to digital output.
• High speed receiver up to 50 MBaud
(25Mbit/s net data rate)
• TTL Data Output (Light to Logic Function)
• Network activity sensing during ZeroPower Mode
(ICC<10µA)
• BUS Activity Status Output
• Good 650nm sensitivity for working in a low
attenuation range of PMMA Fiber
• Low cost
Applications
• Optical Receiver for MOST Systems
MPR3 02
Actual design status
IC Revision package type
J CAI
Optical Sensitivity device marking
-24.5 dBm
MPR3 02
1 page  
Design & Layout rules
• The 100nF bypass capacitors of the FOTs must be located as close as possible between the pins VCC and GND of the
FOTs. Use ceramic caps and tantalum caps with low ESR.
• Also the inductor/ ferrite bead (receiver) and the -3dB - control circuit (transmitter) must be placed as close as
possible to the FOTs. We prefer ferrite beads (e.g. type 74279214 Würth Elektronik) since the D.C. resistance is very
low. In case other inductors are used, the D.C. resistance should be less than 3Ohm.
• For EMC, a ferrite bead should be connected to the power supply, close to the transmitter and the receiver. Do not
use only one ferrite bead together for receiver and transmitter!
• For the ground connection a ground plane is recommended (Y-structure). That means the ground planes of the
transmitter, the receiver and the shielding must be separated. The three ground planes should be connected
together behind the bypass capacitors (refer to the PCB design below). This ground signal should be connected
directly to the ground plane of the MOST controller (e.g. OS8104) and the power supply on the top layer and/or
bottom layer and ground layer as it is indicated in the example below.
• If a multi layer design is used the ground layer must have the same ground separation like shown for the top layer!
• A serial resistor in the Rx/ Tx data line will also reduce EMC - problems. For Rx the resistor must be placed near the
receiver - for Tx the resistor must be placed near the MOST controller chip. The value depends on the distance
between the FOTs and the MOST chip (< 5cm) and can be within a range up to 150R. Higher values for the resistors
will increase jitter and can therefore cause locking problems of the MOST PLL!
• The Rx/ Tx signals should not be routed in parallel over a long distance, but may be embedded with ground copper,
if possible.
• The GND pin and the pin of Rext (15K - resistor) of the transmitter are used for heat dissipation. Therefore there
should be a good connection to the PCB - no isolation gaps! Both pins should dip into a copper area (see layout
example below).
Layout example
The reference board from OASIS Silicon Systems follows the requirements above. The schematic is very similar to the
example above, but does not include the connection to the power supply, the OS8104 or the micro controller.
The examples below for top- and bottom layer is the layout of the reference design board and shows how the layout
around the optical receiver and transmitter should look like.
It is strongly recommended to follow these examples in your design to get best performance!
Note:
1. The buffer circuit (IC1), the connectors and jumpers in the middle to the right section of the schematic are only for being used together with the
reference board, and will not be necessary for your hardware design.
5 Page | ||
| Páginas | Total 7 Páginas | |
| PDF Descargar | [ Datasheet SPFMPR302.PDF ] | |
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