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PDF NTY100N10 Data sheet ( Hoja de datos )
| Número de pieza | NTY100N10 | |
| Descripción | Power MOSFET ( Transistor ) | |
| Fabricantes | ON Semiconductor | |
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NTY100N10
Preferred Device
Power MOSFET 123 A,
100 V N−Channel
Enhancement−Mode TO264
Package
Features
• Source−to−Drain Diode Recovery Time Comparable to a Discrete
Fast Recovery Diode
• Avalanche Energy Specified
• IDSS and RDS(on) Specified at Elevated Temperature
• Pb−Free Package is Available*
Applications
• PWM Motor Control
• Power Supplies
• Converters
MAXIMUM RATINGS (TC = 25°C unless otherwise noted)
Rating
Symbol Value
Unit
Drain−Source Voltage
Drain−Gate Voltage (RGS = 1 MW)
Gate−Source Voltage
− Continuous
− Non−Repetitive (tp v 10 ms)
Drain Current (Note 1)
− Continuous @ TC = 25°C
− Pulsed
Total Power Dissipation (Note 1)
Derate above 25°C
VDSS
VDGR
100
100
V
V
VGS
VGSM
ID
IDM
PD
$ 20
$ 40
123
369
313
2.5
V
V
A
A
Watts
W/°C
Operating and Storage Temperature Range
TJ, Tstg −55 to
150
°C
Single Pulse Drain−to−Source
Avalanche Energy − Starting TJ = 25°C
(VDD = 80 Vdc, VGS = 10 Vdc,
Peak IL = 100 Apk, L = 0.1 mH, RG = 25 W)
Thermal Resistance
− Junction to Case
− Junction to Ambient
Maximum Lead Temperature for Soldering
Purposes, 0.125 in from case for 10 seconds
EAS
RRqqJJCA
TL
500 mJ
0.4 °C/W
25
260 °C
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Pulse Test: Pulse Width = 10 ms, Duty−Cycle = 2%.
http://onsemi.com
123 A, 100 V
9 mW @ VGS = 10 V (Typ)
N−Channel
D
G
S
MARKING DIAGRAM &
PIN ASSIGNMENT
12 3
TO−264
CASE 340G
STYLE 1
NTY100N10
AYYWWG
123
GDS
A = Assembly Location
YY = Year
WW = Work Week
G = Pb−Free Package
ORDERING INFORMATION
Device
NTY100N10
NTY100N10G
Package
TO−264
TO−264
(Pb−Free)
Shipping
25 Units/Rail
25 Units/Rail
Preferred devices are recommended choices for future use
and best overall value.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques Reference
Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 2006
March, 2006 − Rev. 2
1
Publication Order Number:
NTY100N10/D
1 page  
NTY100N10
20000
VDS = 0
16000
Ciss
12000
8000
Crss
VGS = 0
TJ = 25°C
Ciss
4000
0 10
Coss
50
5 10 15 20
Vgs Vds
Figure 7. Capacitance Variation
25
10
8.0 VDS
Q1
6.0
100
QT
VGS
80
Q2
60
4.0 40
2.0
0
0
20
IDS =100 A
Q3 TJ = 25°C
0
50 100 150 200
Qg, TOTAL GATE CHARGE (nC)
Figure 8. Gate−to−Source and Drain−to−Source
Voltage versus Total Charge
10000
1000
100
VDD = 50 V
ID = 100 A
VGS = 10 V
td(off)
tf
tr
10 td(on)
100
VGS = 0 V
TJ = 25°C
80
60
40
20
1.0
1
10 100
RG, GATE RESISTANCE (W)
Figure 9. Resistive Switching Time Variation
versus Gate Resistance
0
0
0.2 0.4 0.6 0.8
1
VSD, SOURCE−TO−DRAIN VOLTAGE (V)
Figure 10. Diode Forward Voltage versus
Current
http://onsemi.com
5
5 Page | ||
| Páginas | Total 8 Páginas | |
| PDF Descargar | [ Datasheet NTY100N10.PDF ] | |
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