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PDF ML610Q412 Data sheet ( Hoja de datos )

Número de pieza ML610Q412
Descripción 8-bit Microcontroller
Fabricantes LAPIS Semiconductor 
Logotipo LAPIS Semiconductor Logotipo



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ML610Q411/Q412
8-bit Microcontroller with a Built-in LCD driver
FEDL610Q411-04
Issue Date: July.13, 2015
GENERAL DESCRIPTION
ML610Q411/Q412 is a high-performance 8-bit CMOS microcontroller into which rich peripheral circuits, such as synchronous
serial port, UART, I2C bus interface (master), buzzer driver, battery level detect circuit, RC oscillation type A/D converter,
12-bit successive approximation type A/D converter, and LCD driver, are incorporated around LAPIS Semiconductor -original
8-bit CPU nX-U8/100.
The CPU nX-U8/100 is capable of efficient instruction execution in 1-intruction 1-clock mode by 3-stage pipe line architecture
parallel procesing. The Flash ROM that is installed as program memory achieves low-voltage low-power consumption operation
(read operation) equivalent to mask ROM and is most suitable for battery-driven applications. The on-chip debug function that
is installed enables program debugging and programming.
M L610Q411/Q412 has a dual clock, runs at 32.768kHz crystal oscillation clock or a built-in 500kHz RC oscillation clock, used
for a system requires the accurate clock or timer.
FEATURES
CPU
8-bit RISC CPU (CPU name: nX-U8/100)
Instruction system: 16-bit instructions
Instruction set: Transfer, arithmetic operations, comparison, logic operations, multiplication/division, bit
manipulations, bit logic operations, jump, conditional jump, call return stack manipulations, arithmetic
shift, and so on
On-Chip debug function
Minimum instruction execution time
30.5 µs (@32.768 kHz system clock)
2µs (@500kHz system clock)
Internal memory
Internal 16KBbyte Flash ROM (8K×16 bits) (including unusable 1KByte TEST area)
Internal 1KByte Data RAM (1024×8 bits)
Interrupt controller
2 non-maskable interrupt sources
Internal source: 1 (Watch dog timer)
External source: 1 (NMI)
19 maskable interrupt sources
Internal sources: 15 (SSIO, SA-A/D converter, I2C, Timer0, Timer1, Timer2, Timer3, 1kHz timer, UART, RC-A/D
converter, PWM, TBC128Hz, TBC32Hz, TBC16Hz, TBC2Hz)
External sources: 4 (P00, P01, P02, P03)
Time base counter
Low-speed time base counter ×1 channel
Frequency compensation (Compensation range: Approx. 488ppm to +488ppm. Compensation accuracy: Approx.
0.48ppm)
High-speed time base counter ×1 channel
1/36

1 page




ML610Q412 pdf
BLOCK DIAGRAM
ML610Q411 Block Diagram
Figure 1 show the block diagram of the ML610Q411.
"*" indicates the secondary function of each port.
FEDL610Q411-04
ML610Q411/ML610Q412
VDD
VSS
RESET_N
TEST
XT0
XT1
OSC0*
LSCLK*
OUTCLK*
VDDL
VDDX
IN0*
CS0*
RCT0*
RS0*
RT0*
RCM*
IN1*
CS1*
RS1*
RT1*
AVDD
AVSS
VREF
AIN0, AIN1
EPSW13
PSW
Timing
Controller
On-Chip
ICE
CPU (nX-U8/100)
GREG
015
ELR13
LR
EA
ALU
SP
Instruction
Decoder
Instruction
Register
Data-bus
RESET &
TEST
OSC
Power
INT
1
RC-ADC
×2
RAM
1024byte
Interrupt
Controller
INT
1
WDT
INT
4
TBC
INT
1
1kHzTC
Capture
×2
INT
4 8bit Timer
×4
ECSR13
DSR/CSR
PC
BUS
Controller
INT
1
INT
1
INT
1
INT
1
INT
1
INT
5
Program
Memory
(Flash)
16Kbyte
SSIO
UART
I2C
PWM
Buzzer
GPIO
12bit-ADC
INT
1
BLD
Display
register
144bit
LCD
Driver
LCD
BIAS
VPP
SCK0*
SIN0*
SOUT0*
RXD0*
TXD0*
SDA*
SCL*
PWM0*
BZ0*
NMI
P00 to P03
P10 to P11
P20 to P22
P30 to P35
P40 to P47
PA0 to PA7
COM0 to COM3
SEG0 to SEG35
VL1, VL2, VL3
C1, C2
Figure 1 ML610Q411 Block Diagram
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5 Page





ML610Q412 arduino
FEDL610Q411-04
ML610Q411/ML610Q412
ML610Q411 Pad Coordinates
PAD
No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
-
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
Pad
Name
VPP
VSS
P20
P21
P22
P40
P41
RESET_N
P42
P43
P44
P45
P46
P47
P30
P31
P34
P32
P33
P35
TEST
VDD
VDDL
VSS
VDDX
XT1
Dummy
XT0
AVSS
VREF
AVDD
(NC)
(NC)
(NC)
(NC)
AIN0
AIN1
(NC)
P10
P11
NMI
P00
P01
P02
P03
VSS
VDD
VSS
(NC)
(NC)
(NC)
XY
(µm) (µm)
-1230
-1150
-1070
-990
-910
-830
-750
-670
-590
-510
-430
-350
-270
-190
-110
-30
50
130
210
290
370
450
530
610
690
770
850
930
1030
1110
1190
-
-
-
-
1312
1312
-
1312
1312
1312
1312
1312
1312
1312
1312
1312
1312
-
-
-
-1212
-1212
-1212
-1212
-1212
-1212
-1212
-1212
-1212
-1212
-1212
-1212
-1212
-1212
-1212
-1212
-1212
-1212
-1212
-1212
-1212
-1212
-1212
-1212
-1212
-1212
-1212
-1212
-1212
-1212
-1212
-
-
-
-
-522
-350
-
-210
-130
-50
30
110
190
270
350
430
510
-
-
-
Table 1 ML610Q411 Pad Coordinates
PAD
No.
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
Pad
Name
(NC)
(NC)
(NC)
(NC)
(NC)
(NC)
(NC)
(NC)
(NC)
(NC)
C2
C1
VL3
VL2
VL1
COM3
COM2
COM1
COM0
SEG0
SEG1
SEG2
SEG3
SEG4
SEG5
SEG6
SEG7
SEG8
SEG9
SEG10
SEG11
SEG12
SEG13
SEG14
SEG15
SEG16
SEG17
SEG18
SEG19
SEG20
SEG21
SEG22
SEG23
SEG24
SEG25
SEG26
SEG27
SEG28
SEG29
SEG30
X
(µm)
-
-
-
-
-
-
-
-
-
-
1220
1140
1060
980
900
820
740
660
580
500
420
340
260
180
100
20
-60
-140
-220
-300
-380
-460
-540
-620
-700
-780
-860
-940
-1020
-1100
-1312
-1312
-1312
-1312
-1312
-1312
-1312
-1312
-1312
-1312
Y
(µm)
-
-
-
-
-
-
-
-
-
-
1212
1212
1212
1212
1212
1212
1212
1212
1212
1212
1212
1212
1212
1212
1212
1212
1212
1212
1212
1212
1212
1212
1212
1212
1212
1212
1212
1212
1212
1212
960
880
800
720
640
560
480
400
320
240
PAD
No.
101
102
103
104
105
106
107
108
109
110
111
112
113
--
Chip Center: X=0,Y=0
Pad
Name
XY
(µm) (µm)
SEG31
SEG32
SEG33
SEG34
SEG35
PA0
PA1
PA2
PA3
PA4
PA5
PA6
PA7
Dummy
-1312
-1312
-1312
-1312
-1312
-1312
-1312
-1312
-1312
-1312
-1312
-1312
-1312
-1312
160
80
0
-80
-160
-240
-320
-400
-480
-560
-640
-720
-800
-908
11/36

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