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PDF ML610Q419C Data sheet ( Hoja de datos )
| Número de pieza | ML610Q419C | |
| Descripción | 8-bit Microcontroller | |
| Fabricantes | LAPIS Semiconductor | |
| Logotipo |  |
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ML610Q419/ML610Q419C
8-bit Microcontroller with a Built-in LCD driver
FEDL610Q419-07
Issue Date: Oct, 28, 2015
GENERAL DESCRIPTION
This LSI is a high-performance 8-bit CMOS microcontroller into which rich peripheral circuits, such as synchronous serial port,
UART, I2C bus interface (master), melody driver, battery level detect circuit, RC oscillation type A/D converter, and LCD
driver, are incorporated around 8-bit CPU nX-U8/100.
The CPU nX-U8/100 is capable of efficient instruction execution in 1-instruction 1-clock mode by 3-stage pipe line architecture
parallel procesing. The Flash ROM that is installed as program memory achieves low-voltage low-power consumption operation
(read operation) equivalent to mask ROM and is most suitable for battery-driven applications.
The on-chip debug function that is installed enables program debugging and programming.
FEATURES
• CPU
− 8-bit RISC CPU (CPU name: nX-U8/100)
− Instruction system: 16-bit instructions
− Instruction set: Transfer, arithmetic operations, comparison, logic operations, multiplication/division, bit
manipulations, bit logic operations, jump, conditional jump, call return stack manipulations, arithmetic
shift, and so on
− On-Chip debug function
− Minimum instruction execution time
30.5 µs (@32.768 kHz system clock)
0.24 4µs (@4.096 MHz system clock)
• Internal memory
− Internal 64KByte Flash ROM (32K×16 bits) (including unusable 1KByte TEST area)
− Internal 4KByte Data Flash (2K×16 bits)
− Internal 2KByte Data RAM (2048×8 bits), 240×9bit Display Allocation RAM
• Interrupt controller
− 1 non-maskable interrupt sources (Internal source: 1)
− 21 maskable interrupt sources (Internal sources: 16, External sources: 5)
• Time base counter
− Low-speed time base counter ×1 channel
Frequency compensation (Compensation range: Approx. −488ppm to +488ppm. Compensation accuracy: Approx.
0.48ppm)
− High-speed time base counter ×1 channel
• Watchdog timer
− Non-maskable interrupt and reset
− Free running
− Overflow period: 4 types selectable (125ms, 500ms, 2s, and 8s)
• Timers
− 8 bits × 4 channels (Timer0-3: 16-bit x 2 configuration available by using Timer0-1 or Timer2-3)
− Clock frequency measurement mode (in one channel of 16-bit configuration using Timer2-3)
1/38
1 page  
BLOCK DIAGRAM
ML610Q419 Block Diagram
Figure 1 show the block diagram of the ML610Q419.
"*" indicates the secondary function of each port.
FEDL610Q419-07
ML610Q419/ML610Q419C
VDD
VSS
RESET_N
TEST0
TEST1_N
XT0
XT1
OSC0*
OSC1*
LSCLK*
OUTCLK*
VDDL
IN0*
CS0*
RS0*
RT0*
CRT0*
RCM*
IN1*
CS1*
RS1*
RT1*
AVDD
AVSS
VREF
AIN0, AIN1,
AIN2, AIN3
EPSW1～3
PSW
Timing
Controller
On-Chip
ICE
RESET &
TEST
CPU (nX-U8/100)
GREG
0～15
ELR1～3
LR
EA
ALU
SP
Instruction
Decoder
Instruction
Register
Data-bus
RAM
2048byte
Interrupt
Controller
ECSR1～3
DSR/CSR
PC
BUS
Controller
INT
2
INT
1
OSC
INT
1
WDT
INT
1
Power
INT
1
RC-ADC
×2
Capture
×2
INT
4
TBC
INT
4 8bit Timer
×2
INT
1
INT
1
INT
5
12bit-ADC
INT
1
BLD
Display Allocation
RAM
Display
register
192bit
Program
Memory
(Flash)
64Kbyte
+
Data
Flash
4Kbyte
SSIO
×2
UART
I2C
PWM
Melody
GPIO
LCD
Driver
LCD
BIAS
SCK0*
SIN0*
SOUT0*
SCK1*
SIN1*
SOUT1*
RXD0*
TXD0*
SDA*
SCL*
PWM0*
MD0*
P00 to P03
P10 to P11
P20 to P22
P30 to P35
P40 to P47
P50 to P53
COM0 to COM3
SEG0 to SEG47
VL1, VL2, VL3
C1, C2
Figure 1 ML610Q419 Block Diagram
5/38
5 Page 
ML610Q419 Pad Coordinates
FEDL610Q419-07
ML610Q419/ML610Q419C
Table 1 ML610Q419 Pad Coordinates
PAD
No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
Pad
Name
Vref
AVSS
VSS
P20
P21
P22
P40
P41
P42
P43
P44
P45
P46
P47
VDD
VSS
VDDL
XT0
XT1
RESET_N
TEST0
TEST1_N
VL1
VL2
VL3
C1
C2
COM0
COM1
COM2
COM3
SEG0
SEG1
SEG2
SEG3
X
(μm)
-1020.0
-860.0
-780.0
-700.0
-620.0
-540.0
-460.0
-380.0
-280.0
-200.0
-120.0
-40.0
40.0
120.0
204.0
284.0
364.0
452.0
612.0
692.0
772.0
852.0
932.0
1012.0
1092.0
1214.0
1214.0
1214.0
1214.0
1214.0
1214.0
1214.0
1214.0
1214.0
1214.0
Y
(μm)
-1494.0
-1494.0
-1494.0
-1494.0
-1494.0
-1494.0
-1494.0
-1494.0
-1494.0
-1494.0
-1494.0
-1494.0
-1494.0
-1494.0
-1494.0
-1494.0
-1494.0
-1494.0
-1494.0
-1494.0
-1494.0
-1494.0
-1494.0
-1494.0
-1494.0
-1325.0
-1245.0
-1165.0
-1085.0
-1005.0
-925.0
-845.0
-765.0
-685.0
-605.0
PAD
No.
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
Pad
Name
SEG4
SEG5
SEG6
SEG7
SEG8
SEG9
SEG10
SEG11
SEG12
SEG13
SEG14
SEG15
SEG16
SEG17
SEG18
SEG19
SEG20
SEG21
SEG22
SEG23
SEG24
SEG25
SEG26
SEG27
SEG28
SEG29
SEG30
SEG31
SEG32
SEG33
SEG34
SEG35
SEG36
SEG37
SEG38
X
(μm)
1214.0
1214.0
1214.0
1214.0
1214.0
1214.0
1214.0
1214.0
1214.0
1214.0
1214.0
1214.0
1214.0
1214.0
1060.0
980.0
900.0
820.0
740.0
660.0
580.0
500.0
420.0
340.0
260.0
180.0
100.0
20.0
-60.0
-140.0
-220.0
-300.0
-380.0
-460.0
-540.0
Y
(μm)
-525.0
-445.0
-365.0
-285.0
-205.0
52.0
258.0
464.0
670.0
876.0
1015.0
1095.0
1175.0
1255.0
1494.0
1494.0
1494.0
1494.0
1494.0
1494.0
1494.0
1494.0
1494.0
1494.0
1494.0
1494.0
1494.0
1494.0
1494.0
1494.0
1494.0
1494.0
1494.0
1494.0
1494.0
PAD
No.
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
Chip Center: X=0,Y=0
Pad
Name
X
(μm)
Y
(μm)
SEG39
SEG40
SEG41
SEG42
SEG43
SEG44
SEG45
SEG46
SEG47
P01
P00
P11
P10
P50
P51
P52
P53
P02
P03
P30
P31
P34
P32
P33
P35
AIN0
AIN1
AIN02
AIN03
AVDD
-620.0
-730.0
-810.0
-890.0
-970.0
-1214.0
-1214.0
-1214.0
-1214.0
-1214.0
-1214.0
-1214.0
-1214.0
-1214.0
-1214.0
-1214.0
-1214.0
-1214.0
-1214.0
-1214.0
-1214.0
-1214.0
-1214.0
-1214.0
-1214.0
-1214.0
-1214.0
-1214.0
-1214.0
-1214.0
1494.0
1494.0
1494.0
1494.0
1494.0
1380.0
1300.0
1220.0
1140.0
1040.0
850.0
760.0
600.0
476.0
270.0
28.0
-52.0
-132.0
-212.0
-292.0
-372.0
-452.0
-532.0
-612.0
-692.0
-833.0
-913.0
-1085.0
-1165.0
-1291.0
11/38
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet ML610Q419C.PDF ] | |
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