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PDF ML610Q482 Data sheet ( Hoja de datos )
| Número de pieza | ML610Q482 | |
| Descripción | 8-bit Microcontroller | |
| Fabricantes | LAPIS Semiconductor | |
| Logotipo |  |
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ML610Q482/ML610482
8-bit Microcontroller
FEDL610Q482-02
Issue Date: May.9, 2014
GENERAL DESCRIPTION
This LSI is a high-performance 8-bit CMOS microcontroller into which rich peripheral circuits, such as synchronous serial port,
UART, I2C bus interface (master), buzzer driver, battery level detect circuit, and RC oscillation type A/D converter, are
incorporated around 8-bit CPU nX-U8/100.
The CPU nX-U8/100 is capable of efficient instruction execution in 1-intruction 1-clock mode by 3-stage pipe line architecture
parallel procesing. The Flash ROM that is installed as program memory achieves low-voltage low-power consumption operation
(read operation) equivalent to mask ROM and is most suitable for battery-driven applications.
The on-chip debug function that is installed enables program debugging and programming.
The ML610Q482P/ ML610482P supporting industrial temperature -40°C to +85°C, are also available.
FEATURES
• CPU
− 8-bit RISC CPU (CPU name: nX-U8/100)
− Instruction system: 16-bit instructions
− Instruction set: Transfer, arithmetic operations, comparison, logic operations, multiplication/division, bit
manipulations, bit logic operations, jump, conditional jump, call return stack manipulations, arithmetic
shift, and so on
− On-Chip debug function (ML610Q482)
− Minimum instruction execution time
30.5 µs (@32.768 kHz system clock)
0.244µs (@4.096 MHz system clock)
• Internal memory
− ML610Q482
Internal 64KByte Flash ROM (32K×16 bits) (including unusable 1KByte TEST area)
Internal 4KByte Data RAM (4096×8 bits)
− ML610482
Internal 64KByte Mask ROM (32K×16 bits) (including unusable 1KByte TEST area)
Internal 4KByte Data RAM (4096×8 bits)
• Interrupt controller
− 2 non-maskable interrupt sources (Internal source: 1, External source: 1)
− 18 maskable interrupt sources (Internal sources: 14, External sources: 4)
• Time base counter
− Low-speed time base counter ×1 channel
Frequency compensation (Compensation range: Approx. −488ppm to +488ppm. Compensation accuracy: Approx.
0.48ppm)
− High-speed time base counter ×1 channel
• Watchdog timer
− Non-maskable interrupt and reset
− Free running
− Overflow period: 4 types selectable (125ms, 500ms, 2s, and 8s @32.768 kHz)
• Timers
− 8 bits × 4 channels (Timer0-3: 16-bit x 2 configuration available by using Timer0-1 or Timer2-3)
− Clock frequency measurement mode (in one channel of 16-bit configuration using Timer2-3)
1/32
1 page  
ML610482 Block Diagram
Figure 2 show the block diagram of the ML610482.
"*" indicates the secondary function of each port.
FEDL610Q482-02
ML610Q482/ML610482
VDD
VSS
RESET_N
TEST
XT0
XT1
OSC0*
OSC1*
LSCLK*
OUTCLK*
VDDL
VDDX
IN0*
CS0*
RS0*
RT0*
RCT0*
RCM*
IN1*
CS1*
RS1*
RT1*
CMPP
CMPM
EPSW1～3
PSW
Timing
Controller
On-Chip
ICE
CPU (nX-U8/100)
GREG
0～15
ELR1～3
LR
EA
ALU
SP
Instruction
Decoder
Instruction
Register
Data-bus
RESET &
TEST
OSC
Power
INT
1
RC-ADC
×2
RAM
4096byte
Interrupt
Controller
INT
1 WDT
INT
4 TBC
INT
4 8bit Timer
×4
BLD
ECSR1～3
DSR/CSR
PC
BUS
Controller
Program
Memory
(Mask ROM)
64Kbyte
INT
1
SSIO
INT
1
UART
INT
1
I2C
INT
1
PWM
Buzzer
INT
5
Analog
Comparator
INT
1
GPIO
SCK0*
SIN0*
RXD0*
TXD0*
SDA*
SCL*
PWM0*
BZ0*
NMI
P00 to P03
P10, P11
P20, P21, P22, P24
P30 to P35
P40 to P47
PA0 to PA7
* Secondary function or Tertiary function
Figure 2 ML610482 Block Diagram
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5 Page 
FEDL610Q482-02
ML610Q482/ML610482
PIN LIST
PAD
No.
7,21,
33,45
24,43
44
46
20
17
18
47
48
19
3
4
5
6
1
2
22
23
34
35
36
8
37
38
40
41
39
Primary function
Secondary function
Pin name I/O
Function
Pin name I/O
Function
Vss
VDD
VDDL
VDDX
VPP
⎯
Negative power supply
pin
⎯
Positive power supply
pin
Power supply pin for
⎯ internal logic
(internally generated)
Power supply pin for
⎯ low-speed oscillation
(internally generated)
Power supply pin for
⎯ Flash ROM
TEST
I/O
Input/output pin for
testing
RESET_
N
I
Reset input pin
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
XT0
I
Low-speed clock
oscillation pin
⎯⎯
⎯
Tertiary function
Pin name I/O
Function
⎯⎯
⎯
⎯⎯
⎯
⎯⎯
⎯
⎯⎯
⎯⎯
⎯⎯
⎯⎯
⎯⎯
⎯
⎯
⎯
⎯
⎯
XT1
O
Low-speed clock
oscillation pin
⎯⎯
⎯
⎯⎯
⎯
NMI
I
Non-maskable
interrupt pin
⎯⎯
⎯
P00/EXI
0
P01/EXI
1
P02/EXI
2/RXD0
Input port, External
I interrupt 0, Capture 0
input
Input port, External
I interrupt 1, Capture 1
input
Input port, External
I interrupt 2, UART0
receive
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
P03/EXI
3
CMPP
CMPM
I
Input port, External
interrupt 3
I
Analog comparator
non-inverted input
I
Analog comparator
inverted input
⎯⎯
⎯⎯
⎯⎯
⎯
⎯
⎯
P10 I Input port
OSC0 I High-speed oscillation
P11 I Input port
OSC1 O High-speed oscillation
P20/LE
D0
O Output port
LSCLK O Low-speed clock output
P21LED
1
O
Output port
OUTCLK
O
High-speed clock
output
P22/LE
D2
O Output port
BZ0 O BZ0 output
P24/LE
D4
O Output port
PWM0 O PWM0 output
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
P30 I/O Input/output port
IN0
I
RC type ADC0
oscillation input pin
⎯⎯
⎯
P31 I/O Input/output port
P32 I/O Input/output port
P33 I/O Input/output port
P34 I/O Input/output port
CS0
RS0
RT0
RCT0
RC type ADC0
O reference capacitor
connection pin
RC type ADC0
O reference resistor
connection pin
O
RC type ADC0 resistor
sensor connection pin
RC type ADC0
O resistor/capacitor
sensor connection pin
⎯
⎯
⎯
PWM0
⎯
⎯
⎯
O
⎯
⎯
⎯
PWM0 output
11/32
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet ML610Q482.PDF ] | |
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