|
|
PDF MCR20AVHM Data sheet ( Hoja de datos )
| Número de pieza | MCR20AVHM | |
| Descripción | high-performance 2.4 GHz IEEE 802.15.4 compliant transceiver | |
| Fabricantes | Freescale Semiconductor | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de MCR20AVHM (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
|
No Preview Available !
Freescale Semiconductor, Inc.
Data Sheet: Advance Information
MCR20AVHM
Rev. 3.1, 04/2015
MCR20AVHM Data Sheet
Low power, high-performance 2.4 GHz IEEE 802.15.4
compliant transceiver with connectivity
MCR20AVHM
The MCR20AVHM transceiver is a low power, high-performance
2.4 GHz, IEEE 802.15.4 compliant transceiver with connectivity
to a broad range of microcontrollers, including the Kinetis family
of products.
The MCR20AVHM transceiver (throughout this document called
MCR20A) enables development of proprietary and standard
802.15.4 based communication protocols such as SMAC,
IEEE802.15.4 PHY-MAC, Thread, ZigBeePRO, RF4CE, and
others.
32 LGA
5 x 5 mm
Typical applications include Home Area Networks consisting of
meters, gateways, in-home displays, and connected appliances,
and also networked building control, home automation applications with lighting control, HVAC, and security
and remote controls for home entertainment products.
Transceiver Performance
Radio peripherals
• 2.4 GHz (2360 to 2480 MHz) covers ISM band
• 24-bit event timer with interrupts
• Fractional-N PLL supports 1 MHz and 5 MHz channels • Eight (8) software programmable GPIOs
• 250 kbps data rate
• Control port for antenna diversity mode or external
• OQPSK modulation
PA and LNA
• Programmable output power
• -102 dBm RX sensitivity
Microcontroller Interface
• Programmable frequency clock output (CLK_OUT)
Standards
• SPI command channel and interface
• 802.15.4 Compliant Transceiver
• Interrupt request output
• Thread, IPv6-6LoWPAN
Operating Characteristics
Transceiver Features
• 1.8 V to 3.6 V operating voltage
• Hardware acceleration for IEEE 802.15.4 2006 packet
• 17mA TX, 19mA RX, < 1mA idle/doze, < 1uA
processing
hybernate typical current
• Support for Dual PAN mode
• operational temperature range : –40°C to +105°C
• Onboard trim of reference crystal
• 128-byte RAM data buffer
Physical Characteristics
• Low-power operating modes with single SPI command
• RoHS compliant, 5 mm x 5 mm, 32-pin MLGA
device wake-up
package
• On-chip voltage regulators
• Small RF footprint, low component count
• Clear Channel Assessment, Energy Detect, Link
Quality Indicator
© 2013–2015 Freescale Semiconductor, Inc. All rights reserved.
1 page  
Transceiver Description
Microcontroller
SCLK
/SEL
MISO
MOSI
SPI
SCLK
/SEL
MISO
MOSI
MCR20A
R_SCLK
R_SSEL_B
R_MISO
R_MOSI
GPIO/RST_B
GPIO/IRQ
GPIO/CLK
RST_B
IRQ
CLK
RST_B
IRQ_B
CLK_OUT
Figure 2. MCU to MCR20A block diagram
1.1.1.1 SPI interface
Microcontroller communication with the MCR20A transceiver is through a 4-wire
serial peripheral interface (SPI). Exclusive access to the MCR20A transceiver's
register set and packet buffer is provided by the SPI. For specific SPI interface
information refer to the SPI section.
1.1.1.2 IRQ management
The MCR20A transceiver has up to 14 individual sources of interrupt requests to the
MCU (see Table 2). These are all capable of individual control, and are logically OR-
combined to drive a single, active low, interrupt request pin (IRQ_B) to the external
MCU. Features supported are:
• The IRQ_B pin can be configured as actively-driven high or open-drain.
• Each interrupt source has its own interrupt status bit in the MCR20A transceiver's
direct register space.
• Each interrupt can be individually controlled by an interrupt mask—The IRQ is
issued when the mask is cleared to 0.
• There is also a global interrupt mask, TRCV_MSK, which can enable or disable
all IRQ_B assertions by programming a single masking bit.
• All status bits use a write-1-to-clear protocol—interrupt status bits are not
affected by reads.
• IRQ_B will remain asserted until all active interrupt sources are cleared or
masked.
MCR20AVHM Data Sheet, Rev. 3.1, 04/2015
5
Freescale Semiconductor, Inc.
5 Page 
Transceiver Functions
• Indirect register 0x5B is read (RSSI)
• Direct register 0x26 is read (RSSI_CONT), however, not enabled in ED case
so ignored
• For LQI, the device is configured to perform an LQI via write to the register 0x7
with 0x00.
• The device is configured to perform an LQI via write to the register 0x7 with
0x00
• Receive sequence is started via write to register 0x3 with 0x1
• Register 0 is polled for bit 2 to be set
• RSSI_CONT_EN bit is enabled in indirect 0x25
• RSSI_CONT_EN bit is disabled in indirect 0x25 (CCA_CTRL) all other bits
are reset or overwrite values
• Direct register 0x0B is read (CCA final)
• Direct register 0x25 is read (LQI)
• Indirect register 0x5B is read (RSSI)
• Direct register 0x26 is read (RSSI_CONT), valid for LQI
For both LQI and ED the input power is swept with a modulated input signal from
-100 dBm to -20 dBm in steps of 1 dBm and the ED and LQI sequences are called
during each step and the results recorded.
MCR20AVHM Data Sheet, Rev. 3.1, 04/2015
11
Freescale Semiconductor, Inc.
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet MCR20AVHM.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| MCR20AVHM | high-performance 2.4 GHz IEEE 802.15.4 compliant transceiver | Freescale Semiconductor |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |