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PDF MAX3379E Data sheet ( Hoja de datos )

Número de pieza MAX3379E
Descripción Dual/Quad Low-Voltage Level Translators
Fabricantes Maxim Integrated 
Logotipo Maxim Integrated Logotipo



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MAX3372E–MAX3379E/
MAX3390E–MAX3393E
±15kV ESD-Protected, 1µA, 16Mbps, Dual/Quad
Low-Voltage Level Translators in UCSP
General Description
The MAX3372E–MAX3379E and MAX3390E–MAX3393E
±15kV ESD-protected level translators provide the level
shifting necessary to allow data transfer in a multivoltage
system. Externally applied voltages, VCC and VL, set the
logic levels on either side of the device. A low-voltage
logic signal present on the VL side of the device appears
as a high-voltage logic signal on the VCC side of the
device, and vice-versa. The MAX3374E/MAX3375E/
MAX3376E/MAX3379E and MAX3390E–MAX3393E unidi-
rectional level translators level shift data in one direction
(VL VCC or VCC VL) on any single data line. The
MAX3372E/MAX3373E and MAX3377E/MAX3378E bidi-
rectional level translators utilize a transmission-gate-
based design (Figure 2) to allow data translation in either
direction (VL VCC) on any single data line. The
MAX3372E–MAX3379E and MAX3390E–MAX3393E
accept VL from +1.2V to +5.5V and VCC from +1.65V to
+5.5V, making them ideal for data transfer between low-
voltage ASICs/PLDs and higher voltage systems.
All devices in the MAX3372E–MAX3379E, MAX3390E–
MAX3393E family feature a three-state output mode that
reduces supply current to less than 1µA, thermal short-
circuit protection, and ±15kV ESD protection on the VCC
side for greater protection in applications that route sig-
nals externally. The MAX3372E/MAX3377E operate at a
guaranteed data rate of 230kbps. Slew-rate limiting
reduces EMI emissions in all 230kbps devices. The
MAX3373E–MAX3376E/MAX3378E/MAX3379E and
MAX3390E–MAX3393E operate at a guaranteed data rate
of 8Mbps over the entire specified operating voltage
range. Within specific voltage domains, higher data rates
are possible. (See the Timing Characteristics table.)
The MAX3372E–MAX3376E are dual level shifters
available in 3 x 3 UCSP™, 8-pin TDFN, and 8-pin
SOT23-8 packages. The MAX3377E/MAX3378E/
MAX3379E and MAX3390E–MAX3393E are quad level
shifters available in 3 x 4 UCSP, 14-pin TDFN, and 14-
pin TSSOP packages.
________________________Applications
SPI, MICROWIRE®, and I2C Level
Translation
Low-Voltage ASIC Level Translation
Smart Card Readers
Cell-Phone Cradles
Portable POS Systems
Portable Communication Devices
Low-Cost Serial Interfaces
Cell Phones
GPS
Telecommunications Equipment
Features
o Guaranteed Data Rate Options
230kbps
8Mbps (+1.2V VL VCC +5.5V)
10Mbps (+1.2V VL VCC +3.3V)
16Mbps (+1.8V VL VCC +2.5V and
+2.5V VL VCC +3.3V)
o Bidirectional Level Translation
(MAX3372E/MAX3373E and
MAX3377E/MAX3378E)
o Operation Down to +1.2V on VL
o ±15kV ESD Protection on I/O VCC Lines
o Ultra-Low 1µA Supply Current in Three-State
Output Mode
o Low-Quiescent Current (130µA typ)
o UCSP, TDFN, SOT23, and TSSOP Packages
o Thermal Short-Circuit Protection
Ordering Information
PART
TEMP RANGE
MAX3372EEKA+T -40°C to +85°C
+Denotes a lead-free package.
T = Tape and reel.
PIN-
PACKAGE
8 SOT23
Ordering Information continued at end of data sheet.
Selector Guide appears at end of data sheet.
UCSP is a trademark of Maxim Integrated Products, Inc.
MICROWIRE is a registered trademark of National
Semiconductor Corp.
Pin Configurations
TOP VIEW
+
I/O VL1 1
I/O VL2 2
MAX3377E/
MAX3378E THREE-STATE 3
N.C. 4
I/O VL3 5
I/O VL4 6
GND 7
14 VCC
13 I/0 VCC1
12 I/0 VCC2
11 N.C.
10 VL
9 I/0 VCC3
8 I/0 VCC4
TDFN-14
(3mm x 3mm)
Pin Configurations continued at end of data sheet.
For pricing, delivery, and ordering information, please contact Maxim Direct
at 1-888-629-4642, or visit Maxim’s website at www.maximintegrated.com.
19-2328; Rev 3; 1/13

1 page




MAX3379E pdf
MAX3372E–MAX3379E/MAX3390E–MAX3393E
±15kV ESD-Protected, 1µA, 16Mbps, Dual/Quad
Low-Voltage Level Translators in UCSP
TIMING CHARACTERISTICS (continued)
(VCC = +1.65V to +5.5V, VL = +1.2V to (VCC + 0.3V), GND = 0, RLOAD = 1MΩ, I/O test signal of Figure 1, TA = TMIN to TMAX, unless
otherwise noted. Typical values are at VCC = +3.3V, VL = +1.8V, TA = +25°C, unless otherwise noted.) (Notes 1, 2)
PARAMETER
+1.2V VL VCC +3.3V
I/O VCC_ Rise Time (Note 4)
I/O VCC_ Fall Time (Note 5)
I/O VL_ Rise Time (Note 4)
I/O VL_ Fall Time (Note 5)
Propagation Delay
Channel-to-Channel Skew
Maximum Data Rate
+2.5V VL VCC +3.3V
I/O VCC_ Rise Time (Note 4)
I/O VCC_ Fall Time (Note 5)
I/O VL_ Rise Time (Note 4)
I/O VL_ Fall Time (Note 5)
Propagation Delay
Channel-to-Channel Skew
Maximum Data Rate
+1.8V VL VCC +2.5V
I/O VCC_ Rise Time (Note 4)
I/O VCC_ Fall Time (Note 5)
I/O VL_ Rise Time (Note 4)
I/O VL_ Fall Time (Note 5)
Propagation Delay
Channel-to-Channel Skew
Maximum Data Rate
SYMBOL
CONDITIONS
tRVCC
tFVCC
tRVL
tFVL
I/OVL-VCC
I/OVCC-VL
tSKEW
Driving I/O VL_
Driving I/O VCC_
Each translator equally loaded
tRVCC
tFVCC
tRVL
tFVL
I/OVL-VCC
I/OVCC-VL
tSKEW
Driving I/O VL_
Driving I/O VCC_
Each translator equally loaded
tRVCC
tFVCC
tRVL
tFVL
I/OVL-VCC
I/OVCC-VL
tSKEW
Driving I/O VL_
Driving I/O VCC_
Each translator equally loaded
MIN TYP MAX UNITS
25 ns
30 ns
30 ns
30 ns
20
ns
20
10 ns
10 Mbps
15 ns
15 ns
15 ns
15 ns
15
ns
15
10 ns
16 Mbps
15 ns
15 ns
15 ns
15 ns
15
ns
15
10 ns
16 Mbps
Note 1: All units are 100% production tested at TA = +25°C. Limits over the operating temperature range are guaranteed by design
and not production tested.
Note 2: For normal operation, ensure VL < (VCC + 0.3V). During power-up, VL > (VCC + 0.3V) will not damage the device.
Note 3: To ensure maximum ESD protection, place a 1µF capacitor between VCC and GND. See Applications Circuits.
Note 4: 10% to 90%
Note 5: 90% to 10%
Maxim Integrated
5

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MAX3379E arduino
MAX3372E–MAX3379E/MAX3390E–MAX3393E
±15kV ESD-Protected, 1µA, 16Mbps, Dual/Quad
Low-Voltage Level Translators in UCSP
Level Translation
For proper operation ensure that +1.65V VCC
+5.5V, +1.2V VL +5.5V, and VL (VCC + 0.3V).
During power-up sequencing, VL (VCC + 0.3V) will
not damage the device. During power-supply sequenc-
ing, when VCC is floating and VL is powering up, a cur-
rent may be sourced, yet the device will not latch up.
The speed-up circuitry limits the maximum data rate for
devices in the MAX3372E–MAX3379E, MAX3390E–
MAX3393E family to 16Mbps. The maximum data rate
also depends heavily on the load capacitance (see the
Typical Operating Characteristics), output impedance
of the driver, and the operational voltage range (see the
Timing Characteristics table).
Speed-Up Circuitry
The MAX3373E–MAX3376E/MAX3378E/MAX3379E and
MAX3390E–MAX3393E feature a one-shot generator that
decreases the rise time of the output. When triggered,
MOSFETs PU1 and PU2 turn on for a short time to pull up
I/O VL_ and I/O VCC_ to their respective supplies (see
Figure 2b). This greatly reduces the rise time and propa-
gation delay for the low-to-high transition. The scope
photo of Rail-to-Rail Driving for 8Mbps Operation in the
Typical Operating Characteristics shows the speed-up
circuitry in operation.
Rise-Time Accelerators
The MAX3373E–MAX3376E/MAX3378E/MAX3379E and
the MAX3390E–MAX3393E have internal rise-time
accelerators allowing operation up to 16Mbps. The
rise-time accelerators are present on both sides of the
device and act to speed up the rise time of the input
and output of the device, regardless of the direction of
the data. The triggering mechanism for these accelera-
tors is both level and edge sensitive. To prevent false
triggering of the rise-time accelerators, signal fall times
of less than 20ns/V are recommended for both the
inputs and outputs of the device. Under less noisy con-
ditions, longer signal fall times may be acceptable.
VL VCC
VL VCC
VL VCC
MAX3372E–MAX3379E
AND MAX3390E–MAX3393E
I/O VL_
DATA
I/O VCC_
GND RLOAD
CLOAD
VL VCC
CLOAD
DATA
MAX3373E–MAX3376E,
MAX3378E/MAX3379E
AND MAX3390E–MAX3393E
I/O VL_
I/O VCC_
RLOAD
GND
I/O VL_
tPD-VCC-LH
tPD-VCC-HL
I/O VCC_
tRVCC
Figure 1c. Open-Drain Driving I/O VCC
tFVCC
Maxim Integrated
I/O VCC_
tPD-VL-LH
tPD-VL-HL
I/O VL_
tRVL
Figure 1d. Open-Drain Driving I/O VL
tFVL
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