PDF T24C02A Data sheet ( Hoja de datos )

Número de pieza T24C02A
Descripción EEPROM
Fabricantes First-Rank Technology 
Logotipo First-Rank Technology Logotipo

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No Preview Available ! T24C02A Hoja de datos, Descripción, Manual

Shenzhen First-Rank Technology Co., Ltd
Version 1.1
reserves the right tochangethis documentation without prior notice.
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T24C02A pdf

must precede any other command (see to Figure 2 on page 5).
STOP CONDITION: A low-to-high transition of SDA with SCL high is a stop condition. After a
read sequence, the stop command will place the EEPROM in a standby power mode (see Figure 2 on
page 5).
ACKNOWLEDGE: All addresses and data words are serially transmitted to and from the EEPROM
in 8-bit words. The EEPROM sends a "0" to acknowledge that it has received each word. This
happens during the ninth clock cycle.
STANDBY MODE: The T24C02A/T24C04A/T24C08A/T24C16A features a low-power standby
mode which is enabled: (a) upon power-up and (b) after the receipt of the STOP bit and the
completion of any internal operations.
MEMORY RESET: After an interruption in protocol, power loss or system reset, any two-wire part
can be reset by following these steps:
1. Clock up to 9 cycles.
2. Look for SDA high in each cycle while SCL is high.
3. Create a start condition.
Figure 1: Data Validity
Figure 2: Start and Stop Definition
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T24C02A arduino
1. This parameter is characterized and is not 100% tested.
2. AC measurement conditions: RL (connects to VCC): 1.3 k (2.5V, 5V), 10 k (1.8V)
Input pulse voltages: 0.3 VCC to 0.7 VCC
Input rise and fall time: 50 ns
Input and output timing reference voltages: 0.5 VCC
The value of RL should be concerned according to the actual loading on the user's system.
Bus Timing
Figure 10: SCL: Serial Clock, SDA: Serial Data I/O
Write Cycle Timing
Figure 11: SCL: Serial Clock, SDA: Serial Data I/O
1. The write cycle time tWR is the time from a valid stop condition of a write sequence to the end of the
internal clear/write cycle.
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