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PDF APDS-9300 Data sheet ( Hoja de datos )
| Número de pieza | APDS-9300 | |
| Descripción | Miniature Ambient Light Photo Sensor | |
| Fabricantes | AVAGO | |
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APDS-9300
Miniature Ambient Light Photo Sensor
with Digital (I2C) Output
Data Sheet
Description
The APDS-9300 is a low-voltage Digital Ambient Light
Photo Sensor that converts light intensity to digital signal
output capable of direct I2C interface. Each device consists
of one broadband photodiode (visible plus infrared) and
one infrared photodiode. Two integrating ADCs convert
the photodiode currents to a digital output that represents
the irradiance measured on each channel. This digital out-
put can be input to a microprocessor where illuminance
(ambient light level) in lux is derived using an empirical
formula to approximate the human-eye response.
Application Support Information
The Application Engineering Group is available to assist
you with the application design associated with APDS-
9300 ambient light photo sensor module. You can contact
them through your local sales representatives for addi-
tional details.
Features
• Approximate the human-eye response
• Precise Illuminance measurement under diverse
lighting conditions
• Programmable Interrupt Function with User-Defined
Upper and Lower Threshold Settings
• 16-Bit Digital Output with I2C Fast-Mode at 400 kHz
• Programmable Analog Gain and Integration Time
• Miniature ChipLED Package
Height - 0.55mm
Length - 2.60mm
Width - 2.20mm
• 50/60-Hz Lighting Ripple Rejection
• Low 2.5-V Input Voltage and 1.8-V Digital Output
• Low Active Power (0.6 mW Typical) with Power Down
Mode
• RoHS Compliant
Applications
• Detection of ambient light to control display
backlighting
o Mobile devices – Cell phones, PDAs, PMP
o Computing devices – Notebooks, Tablet PC, Key
board
o Consumer devices – LCD Monitor, Flat-panel TVs,
Video Cameras, Digital Still Camera
• Automatic Residential and Commercial Lighting
Management
• Automotive instrumentation clusters.
• Electronic Signs and Signals
1 page  
Notes:
2. Optical measurements are made using small–angle incident radiation from light–emitting diode optical sources. Visible 640 nm LEDs and infrared
940 nm LEDs are used for final product testing for compatibility with high–volume production.
3. The 640 nm irradiance Ee is supplied by an AlInGaP light–emitting diode with the following characteristics: peak wavelength lp = 640 nm and
spectral halfwidth Dl½ = 17 nm.
4. The 940 nm irradiance Ee is supplied by a GaAs light–emitting diode with the following characteristics: peak wavelength lp = 940 nm and spectral
halfwidth Dl½ = 40 nm.
5. Integration time Tint, is dependent on internal oscillator frequency (fosc) and on the integration field value in the timing register as described in
the Register Set section. For nominal fosc = 735 kHz, nominal Tint = (number of clock cycles)/fosc.
Field value 00: Tint = (11 • 918)/fosc = 13.7 ms
Field value 01: Tint = (81 • 918)/fosc = 101 ms
Field value 10: Tint = (322 • 918)/fosc = 402 ms
Scaling between integration times vary proportionally as follows:
11/322 = 0.034 (field value 00), 81/322 = 0.252 (field value 01), and 322/322 = 1 (field value 10).
6. Full scale ADC count value is limited by the fact that there is a maximum of one count per two oscillator frequency periods and also by a 2–count
offset.
Full scale ADC count value = ((number of clock cycles)/2 - 2)
Field value 00: Full scale ADC count value = ((11 • 918)/2 - 2) = 5047
Field value 01: Full scale ADC count value = ((81 • 918)/2 - 2) = 37177
Field value 10: Full scale ADC count value = 65535, which is limited by 16 bit register. This full scale ADC count value is reached for 131074
clock cycles, which occurs for Tint = 178 ms for nominal fosc = 735 kHz.
7. Low gain mode has 16x lower gain than high gain mode: (1/16 = 0.0625).
8. For sensor Lux calculation, please refer to the empirical formula in Application Note. It is based on measured Ch0 and Ch1 ADC count values for the
light source specified. Actual Lux is obtained with a commercial luxmeter. The range of the (sensor Lux) / (actual Lux) ratio is estimated based on
the variation of the 640 nm and 940 nm optical parameters. Devices are not 100% tested with fluorescent or incandescent light sources.
CH1/CH0
0 ≤ CH1/CH0 ≤ 0.52
0.52 ≤ CH1/CH0 ≤ 0.65
0.65 ≤ CH1/CH0 ≤ 0.80
0.80 ≤ CH1/CH0 ≤ 1.30
CH1/CH0 ≥ 1.30
Sensor Lux Formula
Sensor Lux = (0.0315 x CH0) – (0.0593 x CH0 x ((CH1/CH0)1.4))
Sensor Lux = (0.0229 x CH0) – (0.0291 x CH1)
Sensor Lux = (0.0157 x CH0) – (0.0180 x CH1)
Sensor Lux = (0.00338 x CH0) – (0.00260 x CH1)
Sensor Lux = 0
AC Electrical Characteristics (VDD = 3 V, Ta = 25 ºC)
Parameter †
t(CONV)
f(SCL)
t(BUF)
t(HDSTA)
Conversion time
Clock frequency
Bus free time between start and stop condition
Hold time after (repeated) start condition. After this
period, the first clock is generated.
t(SUSTA)
Repeated start condition setup time
t(SUSTO)
Stop condition setup time
t(HDDAT)
Data hold time
t(SUDAT)
Data setup time
t(LOW)
SCL clock low period
t(HIGH)
SCL clock high period
tF Clock/data fall time
tR Clock/data rise time
Cj Input pin capacitance
† Specified by design and characterization; not production tested.
Min.
12
-
1.3
0.6
0.6
0.6
0
100
1.3
0.6
-
-
-
Typ.
100
-
-
-
-
-
-
-
-
-
-
-
-
Max. Unit
400 ms
400 kHz
- μs
- μs
- μs
- μs
0.9 μs
- ns
- μs
- μs
300 ns
300 ns
10 pF
5 Page 
Timing Register (1h)
The TIMING register controls both the integration time and the gain of the ADC channels. A common set of control bits
is provided that controls both ADC channels. The TIMING register defaults to 02h at power on.
Table 5. Timing Register
7
65
4
3
2
1h
Resv
Resv
Resv
GAIN
MANUAL
Resv
Reset Value:
0
00 0 0
0
10
INTEG
10
TIMING
Field
Resv
GAIN
BIT
7-5
4
MANUAL 3
Resv
INTEG
2
1:0
Description
Reserved. Write as 0.
Switches gain between low gain and high gain modes.
Writing a 0 selects low gain (1x);
Writing a 1 selects high gain (16x).
Manual timing control.
Writing a 1 begins an integration cycle.
Writing a 0 stops an integration cycle.
NOTE: This field only has meaning when INTEG = 11.
It is ignored at all other times.
Reserved. Write as 0.
Integrate time. This field selects the integration time for each conversion.
Integration time is dependent on the INTEG FIELD VALUE and the internal clock frequency. Nominal integration times
and respective scaling between integration times scale proportionally as shown in Table 6. See Note 5 and Note 6 on
page 4 for detailed information regarding how the scale values were obtained.
Table 6. Integration Time
Integ Field Value
Scale
00 0.034
01 0.252
10 1
11 --
Nominal Integration Time
13.7 ms
101 ms
402 ms
N/A
The manual timing control feature is used to manually start and stop the integration time period. If a particular integra-
tion time period is required that is not listed in Table 6, then this feature can be used. For example, the manual timing
control can be used to synchronize the APDS-9300 device with an external light source (e.g. LED). A start command to
begin integration can be initiated by writing a 1 to this bit field. Correspondingly, the integration can be stopped by
simply writing a 0 to the same bit field.
11
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