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PDF ME60N04 Data sheet ( Hoja de datos )

Número de pieza ME60N04
Descripción N-Channel 40-V (D-S) MOSFET
Fabricantes Matsuki 
Logotipo Matsuki Logotipo



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No Preview Available ! ME60N04 Hoja de datos, Descripción, Manual

N- Channel 40-V (D-S) MOSFET
GENERAL DESCRIPTION
The ME60N04 is the N-Channel logic enhancement mode power
field effect transistors are produced using high cell density DMOS
trench technology. This high density process is especially tailored to
minimize on-state resistance. These devices are particularly suited
for low voltage application such as LCD inverter, computer power
management and DC to DC converter circuits which need low in-line
power loss.
ME60N04
FEATURES
RDS(ON)12m@VGS=10V
RDS(ON)17m@VGS=4.5V
Super high density cell design for extremely low RDS(ON)
Exceptional on-resistance and maximum DC current
capability
APPLICATIONS
Power Management
DC/DC Converter
LCD TV & Monitor Display inverter
CCFL inverter
Secondary Synchronous Rectification
PIN CONFIGURATION
(TO-252)
Top View
Absolute Maximum Ratings (TA=25Unless Otherwise Noted)
Parameter
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current
(Tj=150℃,limited by package)
TC=25
TA=25
Pulsed Drain Current
Avalanche Energy with Single Pulse(L=1mH)
Maximum Power Dissipation
TC=25
(Note A)
TA=25
Operating Junction Temperature
Thermal Resistance-Junction to Ambient(Note A)
Thermal Resistance-Junction to Case(Note A)
Symbol
VDSS
VGSS
ID
IDM
EAS
PD
TJ
RθJA
RθJC
Steady
40
±20
20
12
50
40
30
3
-55 to 150
42
4.3
Note A: The device mounted on 1in2 FR4 board with 2 oz copper
July, 2008-Ver4.0
Unit
V
V
A
A
mJ
W
℃/W
℃/W
01

1 page




ME60N04 pdf
N- Channel 40-V (D-S) MOSFET
TO-252 Package Outline
ME60N04
July, 2008-Ver4.0
SYMBOL
A
A1
B
B1
B2
C
D
D2
D3
H
E
E2
L
L1
L2
L3
P
MILLIMETERS
MIN MAX
2.00
2.50
1.1 1.3
0.30
0.70
0.40
0.80
0.60
1.00
0.40
0.60
5.30
5.70
6.70
7.30
2.20
3.00
9.20
9.80
6.30
6.70
4.80
5.20
1.30
1.70
0.90
1.50
0.50
1.10
0 0.30
2.40
2.80
05

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