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PDF MDT13P02 Data sheet ( Hoja de datos )
| Número de pieza | MDT13P02 | |
| Descripción | 8-bit micro-controller | |
| Fabricantes | Micon Design Technology | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de MDT13P02 (archivo pdf) en la parte inferior de esta página. Total 14 Páginas | ||
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1. Features
MDT13P02
The followings are some of the features on the hardware and software :
Special designed MCU for USB+PS/2
Meet low-speed (1.5Mbps) USB spec Version 1.1
Support 1 device address and 3 endpoints
Working with Agilent ADNS-2610, ADNS-2620, ADNS-2051, ADNS-5020 or PixArt PAN101B, PAN3101
optical mouse sensor
Fully CMOS static design
8-bit data bus
On chip EPROM size: 2.5 K words
Internal RAM size: 80 bytes
37 single word instructions
14-bit instructions
8-level stacks
Operating voltage: 4.0 V ~ 5.25 V
External oscillator frequency: 6-MHz/18-MHz/24-MHz
Internal operation frequency: 12-MHz
Addressing modes include direct, indirect and relative addressing modes
Power-on Reset
Power edge-detector Reset
Sleep Mode for power saving
4 interrupt sources:
-TMR0 timer
-USB Endpoint 0
-USB Endpoint 1
-USB Endpoint 2
TMR0: 8-bit timer
2 types of oscillator can be selected by programming option:
XTAL－Standard crystal oscillator
HFXT－High frequency crystal oscillator
On-chip RC oscillator based Watchdog Timer (WDT)
16 I/O pins with their own independent direction control
This specification are subject to be changed without notice. Any latest information
please preview http;//www.mdtic.com.tw
P. 2
2007/8 Ver. 1.0
1 page  
MDT13P02
(1) IAR (Indirect Address Register): R00
Addressing this location will use the content of MSR to address data memory (not a physical register)
(2) TMR0: R01
(3) PC (Program Counter): R02, R0A
(4) STATUS (Status register): R03
Bit Symbol
0 C Carry bit
1 HC Half Carry bit
2 Z Zero bit
3 /PF Power down bit
4 /TF WDT timer overflow bit
5 RP0 Register Bank select bit
0: 00h~7Fh (Bank0)
1: 80h~FFh (Bank1)
7~6 -- General purpose bit
Function
(5) MSR (Memory Bank Select Register): R04
Memory Bank Select Register:
0: 00h~7Fh (Bank0)
1: 80h~FFh (Bank1)
b7 b6 b5 b4 b3 b2 b1 b0
(6) PORT A: R05
PA7~PA0, PORTA data register
(7) PORT B: R06
PB7~PB0, PORTB data register
Indirect Addressing Mode
(8) PCHLAT: R0A
Write buffer for the upper 4 bits of the Program counter
This specification are subject to be changed without notice. Any latest information
please preview http;//www.mdtic.com.tw
P. 6
2007/8 Ver. 1.0
5 Page 
MDT13P02
Addr Name Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 POR
USBSC
29h
R
ENOUT STAOU FORCE FORCE BUSAC ---0
S TS J K T 0000
EP0RX COUNT COUNT COUNT COUNT DATA1/
2Ah
S32100
IN
0000
OUT SETUP
0000
INTCON
2Bh
1
EP2IE EP1IE EP0IE
-000
EP2IF EP1IF EP0IF
-000
STATU
2Ch
S1
SUSPE USB/PS PB5/CL PS2
USBR POR
D 2 KO CLK
--01
0100
81h OPTION /RBPU
1---
PSA PS2 PS1 PS0
1111
CPIOA CPIOA CPIOA CPIOA CPIOA CPIOA CPIOA CPIOA 1111
85h CPIOA
7 6 5 4 3 2 1 0 1111
CPIOB CPIOB CPIOB CPIOB CPIOB CPIOB CPIOB CPIOB 1111
86h CPIOB
7 6 5 4 3 2 1 0 1111
Note: u=unchanged, x=unknown, -=unimplemented, read as “0”
q=value depends on the condition of the following table
Other
reset
---0
0000
0000
0000
-000
-000
--01
0uuu
1---
1111
uuuu
uuuu
uuuu
uuuu
STATUS0 BITS THEIR SIGNIFICANCE
/TO /PD
Condition
11
Power on reset
01
WDT reset
00
WDT wake_up
uu
USB reset durning normal operation
10
Interrupt wake_up from sleep
RESET CONDITON FOR SPECIAL REGISTER
Condition
Power on reset
USB reset durning normal operation
WDT reset
WDT wake_up
Interrupt wake_up from sleep
Porgram counter Status0 register
000h
--01 1xxx
000h
--0u uuuu
000h
--00 1uuu
PC+1
--u0 0uuu
PC+1
uuu1 0uuu
x=unknown, u=unchanged, q=value depends on condtion, -=unimplemented,read as “0”
This specification are subject to be changed without notice. Any latest information
please preview http;//www.mdtic.com.tw
P. 12
2007/8 Ver. 1.0
11 Page | ||
| Páginas | Total 14 Páginas | |
| PDF Descargar | [ Datasheet MDT13P02.PDF ] | |
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