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PDF MSM514800CSL Data sheet ( Hoja de datos )
| Número de pieza | MSM514800CSL | |
| Descripción | DYNAMIC RAM | |
| Fabricantes | OKI electronic componets | |
| Logotipo |  |
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E2G0024-17-42
¡ Semiconductor¡ Semiconductor
This MveSrsMio5n1:4J8a0n0.C19/C98SL
Previous version: May 1997
MSM514800C/CSL
524,288-Word ¥ 8-Bit DYNAMIC RAM : FAST PAGE MODE TYPE
DESCRIPTION
The MSM514800C/CSL is a 524,288-word ¥ 8-bit dynamic RAM fabricated in Oki's silicon-gate
CMOS technology. The MSM514800C/CSL achieves high integration, high-speed operation, and
low-power consumption because Oki manufactures the device in a quadruple-layer polysilicon/
single-layer metal CMOS process. The MSM514800C/CSL is available in a 28-pin plastic SOJ or 28-
pin plastic TSOP. The MSM514800CSL (the self-refresh version) is specially designed for lower-
power applications.
FEATURES
• 524,288-word ¥ 8-bit configuration
• Single 5 V power supply, ±10% tolerance
• Input : TTL compatible, low input capacitance
• Output : TTL compatible, 3-state
• Refresh : 1024 cycles/16 ms, 1024 cycles/128 ms (SL version)
• Fast page mode, read modify write capability
• CAS before RAS refresh, hidden refresh, RAS-only refresh capability
• CAS before RAS self-refresh capability (SL version)
• Package options:
28-pin 400 mil plastic SOJ
(SOJ28-P-400-1.27)
(Product : MSM514800C/CSL-xxJS)
28-pin 400 mil plastic TSOP
(TSOPII28-P-400-1.27-K) (Product : MSM514800C/CSL-xxTS-K)
xx indicates speed rank.
PRODUCT FAMILY
Family
MSM514800C/CSL-60
MSM514800C/CSL-70
MSM514800C/CSL-80
Access Time (Max.) Cycle Time
Power Dissipation
tRAC tAA tCAC tOEA (Min.) Operating (Max.) Standby (Max.)
60 ns 30 ns 20 ns 20 ns 110 ns
660 mW
70 ns 35 ns 20 ns 20 ns
80 ns 40 ns 20 ns 20 ns
130 ns
150 ns
605 mW
550 mW
5.5 mW/
1.1 mW (SL version)
1/16
1 page  
¡ Semiconductor
MSM514800C/CSL
DC Characteristics
Parameter
Symbol Condition
Output High Voltage
VOH IOH = –5.0 mA
Output Low Voltage
VOL IOL = 4.2 mA
0 V £ VI £ 6.5 V;
Input Leakage Current ILI All other pins not
under test = 0 V
DQ disable
Output Leakage Current ILO 0 V £ VO £ 5.5 V
Average Power
Supply Current
(Operating)
Power Supply
Current (Standby)
Average Power
Supply Current
(RAS-only Refresh)
Power Supply
Current (Standby)
RAS, CAS cycling,
ICC1 tRC = Min.
RAS, CAS = VIH
ICC2 RAS, CAS
≥ VCC –0.2 V
RAS cycling,
ICC3 CAS = VIH,
tRC = Min.
RAS = VIH,
ICC5 CAS = VIL,
DQ = enable
Average Power
RAS cycling,
Supply Current
(CAS before RAS Refresh)
ICC6
CAS before RAS
Average Power
RAS = VIL,
Supply Current
ICC7 CAS cycling,
(Fast Page Mode)
Average Power
Supply Current
tPC = Min.
tRC = 125 ms,
ICC10 CAS before RAS,
(Battery Backup)
tRAS £ 1 ms
Average Power
Supply Current
(CAS before RAS
RAS £ 0.2 V,
ICCS CAS £ 0.2 V
Self-Refresh)
(VCC = 5 V ±10%, Ta = 0°C to 70°C)
MSM514800 MSM514800 MSM514800
C/CSL-60 C/CSL-70 C/CSL-80 Unit Note
Min. Max. Min. Max. Min. Max.
2.4 VCC 2.4 VCC 2.4 VCC V
0 0.4 0 0.4 0 0.4 V
–10 10 –10 10 –10 10 mA
–10 10 –10 10 –10 10 mA
— 120 — 110 — 100 mA 1, 2
— 2—2 —2
mA 1
— 1—1 —1
— 200 — 200 — 200 mA 1, 5
— 120 — 110 — 100 mA 1, 2
— 5 — 5 — 5 mA 1
— 120 — 110 — 100 mA 1, 2
— 110 — 100 — 90 mA 1, 3
1, 4,
— 300 — 300 — 300 mA
5
— 300 — 300 — 300 mA 1, 5
Notes:
1. ICC Max. is specified as ICC for output open condition.
2. The address can be changed once or less while RAS = VIL.
3. The address can be changed once or less while CAS = VIH.
4. VCC – 0.2 V £ VIH £ 6.5 V, –1.0 V £ VIL £ 0.2 V.
5. SL version.
5/16
5 Page 
¡ Semiconductor
MSM514800C/CSL
Fast Page Mode Read Cycle
RAS
VIH
VIL
–
–
CAS
VIH
VIL
–
–
VIH –
,,,AddressVIL–
tAR
tCRP tRCD
tRAD
tASR tRAH tASC
tCAS
tCSH
tCAH
Row Column
tRCS
tRASP
tRHCP
tPC
tCP
tCAS
tASC tCAH
tRSH
tCP
tCAS
tRAL
tASC tCAH
Column
tRCH
tRCS
tRCH
Column
tRCS
tRP
tCRP
tRCH
WE
VIH
VIL
–
–
OE
VIH
VIL
–
–
DQ
VOH –
VOL –
tAA
tOEA
tAA
tCPA
tOEA
tAA
tCPA
tOEA
tRRH
tCAC
tRAC
tOFF
tOEZ
Valid
tCLZ Data-out
tCAC
tCLZ
tOFF
tOEZ
Valid
Data-out
tCAC
tCLZ
tOFF
tOEZ
Valid
Data-out
"H" or "L"
Fast Page Mode Write Cycle (Early Write)
,RAS
VIH
VIL
–
–
CAS VIH –
VIL –
VIH –
,,,AddressVIL–
tAR
tCRP
tRCD
tCAS
tASR
tCSH
tRAH tASC tCAH
Row Column
tRAD
tCWL
tRASP
tPC
tCP
tCAS
tASC tCAH
Column
tCWL
tRHCP
tRSH
tCP
tCAS
tASC tCAHtRAL
Column
tRWL
tRP
tCRP
WE
VIH
VIL
–
–
tWCS
tWCH
tWP
tWCR
tWCS
tWCH
tWP
tWCS
tCWL
tWCH
tWP
tDS tDH
tDS tDH
tDS tDH
DQ
VIH
VIL
–
–
Valid Data-in
tDHR
Valid
Data-in
Valid
Data-in
Note: OE = "H" or "L"
"H" or "L"
11/16
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| PDF Descargar | [ Datasheet MSM514800CSL.PDF ] | |
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