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PDF MT220WW01-V0 Data sheet ( Hoja de datos )
| Número de pieza | MT220WW01-V0 | |
| Descripción | LCD Module | |
| Fabricantes | INNOLUX | |
| Logotipo |  |
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SPEC NO. MT220WW01 V.0
PA G E
5/22
B. Electrical Specifications
1.Pin assignment
Connector ʳ
JAE FI-XB30SSRL-HF16, Foxconn GS23302-0311R-7F or mechanical interface equivalent connector.
Pin No.
Symbol
Description
Frame
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
Frame
VSS
RXinO0-
RXinO0+
RXinO1-
RXinO1+
RXinO2-
RXinO2+
VSS
RXOC-
RXOC+
RXinO3-
RXinO3+
RXinE0-
RXinE0+
VSS
RXinE1-
RXinE1+
VSS
RXinE2-
RXinE2+
RXEC-
RXEC+
RXinE3-
RXinE3+
VSS
VSS
NC
VSS
VCC
VCC
VCC
VSS
Ground
-LVDS differential data input, Chan 0-Odd
+LVDS differential data input, Chan 0-Odd
-LVDS differential data input, Chan 1-Odd
+LVDS differential data input, Chan 1-Odd
-LVDS differential data input, Chan 2-Odd
+LVDS differential data input, Chan 2-Odd
Ground
-LVDS differential Clock input (Odd)
+LVDS differential Clock input (Odd)
-LVDS differential data input, Chan 3-Odd
+LVDS differential data input, Chan 3-Odd
-LVDS differential data input, Chan 0-Even
+LVDS differential data input, Chan 0-Even
Ground
-LVDS differential data input, Chan 1-Even
+LVDS differential data input, Chan 1-Even
Ground
-LVDS differential data input, Chan 2-Even
+LVDS differential data input, Chan 2-Even
-LVDS differential Clock input (Even)
+LVDS differential Clock input (Even)
-LVDS differential data input, Chan 3-Even
+LVDS differential data input, Chan 3-Even
Ground
Ground
No Connection
Ground
+5.0V power supply
+5.0V power supply
+5.0V power supply
Ground
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SPEC NO. MT220WW01 V.0
PA G E
11/22
c. Input signal timing
Support Input Timing Table
The input signal timing specifications are shown as the following table and timing diagram.
Signal
Item
Description
Min.
Typ.
Max.
Clock
Dclk
period
frequency
12.2
16.8
21.23
47.1
59.6
82
Vertical
TV_TOTAL
TV_DATA
TVB
fV
V total line number
Data duration
V-blank
frequency
1059
1050
9
50
1080
1050
30
60
1100
1050
50
76
Horizontal
TH_TOTAL
H total pixel number
890 920 1004
TH_DATA
Data duration
840 840 840
THB H-blank
73 80 164
Unit
nS
MHz
TH
TH
TH
Hz
DClk
DClk
DClk
Note: Because this module is operated by DE only mode, Hsync and Vsync input signals should be set
to low logic level or ground. Otherwise, this module would operate abnormally.
INPUT SIGNAL TIMING DIAGRAM
Tv
Tvd
Tvb
DE
DCLK
DE
Tc
Thb
Th
Thd
DATA
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TO ANY OTHER FORMS WITHOUT
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| Páginas | Total 22 Páginas | |
| PDF Descargar | [ Datasheet MT220WW01-V0.PDF ] | |
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