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PDF CS3301A Data sheet ( Hoja de datos )
| Número de pieza | CS3301A | |
| Descripción | Differential Amplifier | |
| Fabricantes | Cirrus Logic | |
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CS3301A
Low-noise, Programmable Gain, Differential Amplifier
Features & Desription
z Signal Bandwidth: DC to 2 kHz
z Selectable Gain: x1, x2, x4, x8, x16, x32, x64
z Differential Inputs, Differential Outputs
• Multiplexed inputs: INA, INB, 800Ω termination
• Rough / fine outputs for CS5371A / 72A / 73A
• Max signal amplitude: 5 Vpp differential
• Low input bias: 1 nA typical
z Outstanding Noise Performance
• 8.5 nV/ Hz from 0.1 Hz to 2 kHz
• 0.180 µVp-p between 0.1 Hz and 10 Hz
z Low Total Harmonic Distortion
• -121 dB THD typical (0.0000891%)
• -112 dB THD maximum (0.0002512%)
z Low Power Consumption
• Normal operation: 5.5 mA typical
• Power down: 10 µA typical
z Small 24-pin SSOP Package
z Bipolar Power Supply Configuration
• VA+ = +2.5 V; VA- = -2.5 V; VD = +3.3 V
Description
The CS3301A is a low-noise differential input, dif-
ferential output amplifier with programmable gain,
optimized for amplifying signals from low-imped-
ance sensors such as geophones. The gain
settings are binary weighted (x1, x2, x4, x8, x16,
x32, x64) and are selected using simple pin set-
tings. Two sets of external inputs, INA and INB,
simplify system design as inputs from a sensor and
test DAC. An internal 800 Ω termination can also be
selected for noise tests.
Amplifier noise performance is outstanding with a
noise density of 8.5 nV/ Hz over the 0.1 Hz to
2 kHz bandwidth. Distortion performance is also ex-
tremely good, typically -121 dB THD at x1 gain. Flat
noise down to 0.1 Hz and low total harmonic distor-
tion make this amplifier ideal for low-frequency,
low-amplitude, differential signals requiring maxi-
mum dynamic range.
ORDERING INFORMATION
See page 15.
VA+
CLK
VD
INA+
INB+
+
OUTR+
- OUTF+
MUX0
MUX1
GAIN0
GAIN1
GAIN2
INA-
INB-
VA-
-
+
PWDN GND
OUTF-
OUTR-
http://www.cirrus.com
Copyright © Cirrus Logic, Inc. 2007
(All Rights Reserved)
MAR ‘07
DS757F1
1 page  
CS3301A
ANALOG CHARACTERISTICS (CONT.)
Parameter
Gain
Gain, Differential
Gain, Common Mode
Gain Accuracy, Absolute
Gain Accuracy, Relative
Gain Drift
Offset
Offset Voltage, Input Referred
Offset After Calibration, Absolute
Offset Calibration Range
Offset Voltage Drift
Symbol Min
(Note 6)
(Note 7)
(Note 8) 2x
4x
8x
16x
32x
64x
(Note 4, 9)
GAIN
GAINCM
GAINABS
GAINREL
GAINTC
x1
-
-
-0.4
-
-
-
-
-
-
(Note 10) OFST
(Note 11)
(Note 12)
(Note 4, 9)
OFSTCAL
OFSTRNG
OFSTTC
-
-
-
-
CS3301A
Typ
-
x1
±1
-0.2
-0.2
-0.2
-0.2
-0.3
-0.3
5
±5
±1
100
0.1
Max Unit
x64
-
±2 %
0
-
-
%
-
-
-
- ppm / ºC
±15 µV
- µV
- % FS
- µV / ºC
6. Common mode signals pass unchanged through the differential amplifier architecture and are rejected
by the CS5371A / 72A / 73A modulator CMRR.
7. Absolute gain accuracy tests the matching of x1 gain across multiple CS3301A devices.
8. Relative gain accuracy tests the tracking of x2, x4, x8, x16, x32, x64 gain relative to x1 gain on a single
CS3301A device.
9. Specification is for the parameter over the specified temperature range and is for the CS3301A device
only. It does not include the effects of external components.
10. Offset voltage is tested with the amplifier inputs connected to the internal 800 Ω termination.
11. The absolute offset after calibration specification applies to the effective offset voltage of the CS3301A
output when used with the CS5371A / 72A / 73A modulator and CS5376A / 78 digital filter, and is
measured from the digitally calibrated output codes of the digital filter.
12. The CS3301A offset calibration is performed digitally with the CS5371A / 72A / 73A modulator and
CS5376A / 78 digital filter and includes the full scale signal range. Calibration offsets of greater than
± 5% of full scale will begin to subtract from system dynamic range.
DS757F1
5
5 Page 
CS3301A
made using the MUX0 and MUX1 pins as shown in
Table 1 on page 7.
Although a mux selection is provided to enable the
INA and INB switches simultaneously, signal cur-
rent should not be driven through them in this
mode. The CS3301A mux switches will maintain
good linearity only with minimal signal currents.
2.2.4 Power Down Selection
A power-down mode is available to shut down the
amplifier when not in use. When enabled, all inter-
nal circuitry is disabled, the analog inputs and out-
puts go high-impedance, and the device enters a
micro-power state. Power down mode is selected
using the PWDN pin, which is active high.
2.3 Power Supplies
2.3.1 Analog Power Supplies
The analog power pins of the CS3301A are speci-
fied to run from bipolar ±2.5 V power supplies.
When using bipolar power supplies, the analog sig-
nal common mode voltage should be biased to 0 V.
The analog power supplies are recommended to be
bypassed to system ground using 0.1 µF X7R type
capacitors.
The VA- supply is connected to the CMOS sub-
strate and as such must remain the most negative
applied voltage. It is recommended to clamp the
VA- supply to system ground using a reversed bi-
ased Schottky diode to prevent possible damage re-
lated to mis-matched power supply initialization.
2.3.2 Digital Power Supplies
The digital voltage across the VD and GND pins is
specified for a +3.3 V power supply. The digital
power supply should be bypassed to system ground
using a 0.01 µF X7R type capacitor.
DS757F1
11
11 Page | ||
| Páginas | Total 16 Páginas | |
| PDF Descargar | [ Datasheet CS3301A.PDF ] | |
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