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PDF TSL2571 Data sheet ( Hoja de datos )
| Número de pieza | TSL2571 | |
| Descripción | LIGHT-TO-DIGITAL CONVERTER | |
| Fabricantes | TAOS | |
| Logotipo |  |
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Features
D Ambient Light Sensing (ALS)
− Approximates Human Eye Response
− Programmable Analog Gain
− Programmable Integration Time
− Programmable Interrupt Function with
Upper and Lower Threshold
− Resolution Up to 16 Bits
− Very High Sensitivity — Operates Well
Behind Darkened Glass
− Up to 1,000,000:1 Dynamic Range
D Programmable Wait Timer
− Programmable from 2.72 ms
to > 8 Seconds
− Wait State — 65 mA Typical Current
D I2C Interface Compatible
− Up to 400 kHz (I2C Fast Mode)
− Dedicated Interrupt Pin
D Small 2 mm y 2 mm ODFN Package
D Sleep Mode — 2.5 mA Typical Current
TSL2571
LIGHT-TO-DIGITAL CONVERTER
TAOS117A − FEBRUARY 2011
PACKAGE FN
DUAL FLAT NO-LEAD
(TOP VIEW)
VDD 1
SCL 2
GND 3
6 SDA
5 INT
4 NC
Applications
D Display Management
D Backlight Control
D Portable Device Power Optimization
D Cell Phones, PDA, GPS
D Notebooks and Monitors
D LCD TVs
Description
The TSL2571 family of devices provides ambient light sensing (ALS) that approximates human eye response
to light intensity under a variety of lighting conditions and through a variety of attenuation materials. While useful
for general purpose light sensing, the device is particularly useful for display management with the purpose of
extending battery life and providing optimum viewing in diverse lighting conditions. Display panel and keyboard
backlighting can account for up to 30 to 40 percent of total platform power. The ALS features are ideal for use
in notebook PCs, LCD monitors, flat-panel televisions, and cell phones.
Functional Block Diagram
GND
VDD
Wait Control
CH0
CH0
ADC
CH0
Data
ALS Control
CH1
ADC
CH1
Data
CH1
Interrupt
Upper Limit
Lower Limit
INT
SCL
SDA
The LUMENOLOGY r Company
r
Texas Advanced Optoelectronic Solutions Inc.
1001 Klein Road S Suite 300 S Plano, TX 75074 S (972r) 673-0759
www.taosinc.com
Copyright E 2011, TAOS Inc.
1
1 page  
TSL2571
LIGHT-TO-DIGITAL CONVERTER
TAOS117A − FEBRUARY 2011
Wait Characteristics, VDD = 3 V, TA = 255C, WEN = 1 (unless otherwise noted)
PARAMETER
TEST CONDITIONS
CHANNEL
MIN TYP
Wait step size
WTIME = 0xFF
2.58 2.72
Wait number of integration steps
1
MAX
2.9
256
UNIT
ms
steps
AC Electrical Characteristics, VDD = 3 V, TA = 255C (unless otherwise noted)
PARAMETER†
TEST CONDITIONS
MIN
f(SCL)
Clock frequency (I2C only)
0
t(BUF)
Bus free time between start and stop condition
1.3
t(HDSTA)
Hold time after (repeated) start condition. After
this period, the first clock is generated.
0.6
t(SUSTA)
Repeated start condition setup time
t(SUSTO)
Stop condition setup time
t(HDDAT)
Data hold time
t(SUDAT)
Data setup time
t(LOW)
SCL clock low period
t(HIGH)
SCL clock high period
tF Clock/data fall time
tR Clock/data rise time
Ci Input pin capacitance
† Specified by design and characterization; not production tested.
0.6
0.6
0
100
1.3
0.6
TYP MAX UNIT
400 kHz
μs
μs
μs
μs
μs
ns
μs
μs
300 ns
300 ns
10 pF
PARAMETER MEASUREMENT INFORMATION
SCL
t(BUF)
SDA
t(LOW)
t(R)
VIH
VIL
t(HDSTA)
t(HDDAT)
VIH
VIL
t(F)
t(HIGH) t(SUSTA)
t(SUDAT)
P
Stop
Condition
S
Start
Condition
SCL
S
Start
Stop
t(LOWSEXT)
SCLACK
SCLACK
t(LOWMEXT)
t(LOWMEXT)
t(LOWMEXT)
SDA
Figure 1. Timing Diagrams
The LUMENOLOGY r Company
r
www.taosinc.com
r
t(SUSTO)
P
Copyright E 2011, TAOS Inc.
5
5 Page 
TSL2571
LIGHT-TO-DIGITAL CONVERTER
TAOS117A − FEBRUARY 2011
I2C Protocol
Interface and control are accomplished through an I2C serial compatible interface (standard or fast mode) to
a set of registers that provide access to device control functions and output data. The devices support the 7-bit
I2C addressing protocol.
The I2C standard provides for three types of bus transaction: read, write, and a combined protocol (Figure 17).
During a write operation, the first byte written is a command byte followed by data. In a combined protocol, the
first byte written is the command byte followed by reading a series of bytes. If a read command is issued, the
register address from the previous command will be used for data access. Likewise, if the MSB of the command
is not set, the device will write a series of bytes at the address stored in the last valid command with a register
address. The command byte contains either control information or a 5-bit register address. The control
commands can also be used to clear interrupts.
The I2C bus protocol was developed by Philips (now NXP). For a complete description of the I2C protocol, please
review the NXP I2C design specification at http://www.i2c−bus.org/references/.
A Acknowledge (0)
N Not Acknowledged (1)
P Stop Condition
R Read (1)
S Start Condition
S Repeated Start Condition
W Write (0)
... Continuation of protocol
Master-to-Slave
Slave-to-Master
17
S Slave Address
11
WA
8
Command Code
1
A
I2C Write Protocol
8
Data Byte
11
A ... P
17
S Slave Address
11
RA
8
Data
1
A
I2C Read Protocol
8
Data
11
A ... P
17
S Slave Address
11
WA
8
Command Code
11
AS
7
Slave Address
8
Data
1
A
I2C Read Protocol — Combined Format
8
Data
Figure 9. I2C Protocols
11
RA
11
A ... P
The LUMENOLOGY r Company
r
www.taosinc.com
r
Copyright E 2011, TAOS Inc.
11
11 Page | ||
| Páginas | Total 24 Páginas | |
| PDF Descargar | [ Datasheet TSL2571.PDF ] | |
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