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PDF MT3339 Data sheet ( Hoja de datos )

Número de pieza MT3339
Descripción GPS All-in-One Solution
Fabricantes MEDIATEK　
Logotipo MEDIATEK Logotipo



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MT3339 GPS All-in-One Solution
Data Sheet
Version:
Release date:
1.05
2011-09-19
© 2011 MediaTek Inc.
This document contains information that is proprietary to MediaTek Inc.
Unauthorized reproduction or disclosure of this information in whole or in part is strictly prohibited.
Specifications are subject to change without notice.
M
e
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1 page




MT3339 pdf
MT3339
GPS All-in-One Solution
Confidential A
5.19 SYNC.................................................................................................................................. 20
5.20 Power scheme .................................................................................................................... 21
6 Electrical Characteristics .......................................................................................................... 25
6.1 DC characteristics .............................................................................................................. 25
6.1.1 Absolute maximum ratings...................................................................................... 25
6.1.2 Recommended operating conditions ...................................................................... 25
6.1.3 General DC characteristics ..................................................................................... 26
6.1.4 DC electrical characteristics for 2.8 volts operation................................................ 26
6.1.5 DC electrical characteristics for 1.8 volts operation................................................ 26
6.1.6 DC electrical characteristics for 1.2 volts operation (for TIMER and 32K_OUT).... 26
6.2 Analog related characteristics ............................................................................................ 27
6.2.1 SMPS DC characteristics........................................................................................ 27
6.2.2 TCXO LDO DC characteristics ............................................................................... 27
6.2.3 TCXO SWITCH DC characteristics ........................................................................ 27
6.2.4 1.2 volts core LDO DC characteristics.................................................................... 28
6.2.5 1.2 volts RTC LDO DC characteristics ................................................................... 28
6.2.6 32 KHz crystal oscillator (XOSC32)........................................................................ 28
6.3 RF related characteristics................................................................................................... 28
6.3.1 DC electrical characteristics for RF part ................................................................. 28
6.3.2 RX chain from LNA to PGA, before ADC................................................................ 29
6.3.3 Receiver front-end part (LNA only) ......................................................................... 29
6.3.4 Mixer and channel selection filter (CSF)................................................................. 29
6.3.5 Programmable gain amplifier (PGA)....................................................................... 30
6.3.6 2-bit and 4-bit quantizer (ADC) ............................................................................... 30
6.3.7 Integrated synthesizer............................................................................................. 30
6.3.8 Crystal oscillator (XO) ............................................................................................. 30
7 Interface Characteristics ........................................................................................................... 31
7.1 JTAG interface timing ......................................................................................................... 31
7.2 RS-232 interface timing ...................................................................................................... 31
7.3 SPI interface timing ............................................................................................................ 32
7.4 I2C interface timing............................................................................................................. 32
7.5 EEPROM I2C interface timing ............................................................................................ 33
8 Package Description .................................................................................................................. 34
8.1 Top mark............................................................................................................................. 34
8.2 Package dimensions .......................................................................................................... 35
Lists of Figures
Figure 3-1: MT3339 system block diagram........................................................................................... 14
Figure 3-2: MT3339 RF functional block diagram................................................................................. 14
Figure 5-1: RTC with internal RTC LDO application circuit 1................................................................ 16
Figure 5-2: RTC with internal RTC LDO application circuit 2................................................................ 17
Figure 5-3: Power on reset diagram ..................................................................................................... 18
Figure 5-4: Power on/off reset behavior................................................................................................ 18
Figure 5-5: Flow diagram of SYNC function ......................................................................................... 21
MediaTek Confidential
© 2011 MediaTek Inc.
This document contains information that is proprietary to MediaTek Inc.
Unauthorized reproduction or disclosure of this information in whole or in part is strictly prohibited.
Page 5 of 37

5 Page





MT3339 arduino
MT3339
GPS All-in-One Solution
Confidential A
Pin#
Symbol
Type
2.8V, LVTTL I/O
B6
JDO/PPS/DBG_TX
PPU, PPD, SMT
2mA ~ 16mA PDR
2.8V, LVTTL I/O
D6 JRCK/CXO_CS PPU, PPD, SMT
2mA ~ 16mA PDR
2.8V, LVTTL I/O
A7
JRST#/H_SPI_SCS#/CXO_T
SENS/SYNC_PULSE
PPU, PPD, SMT
2mA ~ 16mA PDR
External system interface (4 pins)
2.8V, LVTTL I/O
C4 EINT0/MM_I2CC/BSI_CS PPU, PPD, SMT
2mA ~ 16mA PDR
2.8V, LVTTL I/O
C5
EINT1/MM_I2CD/PPS/BSI_D
ATA
PPU, PPD, SMT
2mA ~ 16mA PDR
2.8V, LVTTL I/O
C7 EINT2/DBG_RX/PPS PPU, PPD, SMT
2mA ~ 16mA PDR
2.8V, LVTTL I/O
D8 EINT3/DBG_TX/PPS PPU, PPD, SMT
2mA ~ 16mA PDR
Description
JTAG interface data output
Default: 75K pull-up
Default: 8mA driving
Shared with GIO9
Strap pin host_sel[0]
Host_sel[1:0] Interface
2’b00: I2C
2’b01: UART MEIF
2’b10: SPI
2’b11: UART
JTAG interface return clock
Default: 75K pull-up
Default: 8mA driving
Shared with GIO10
Strap pin host_sel[1]
JTAG interface reset
Default: 75K pull-up
Default: 8mA driving
Shared with GIO11
External interrupt 0
Default: 75K pull-down
Default: 8mA driving
Shared with GIO12
External interrupt 1
Default: 75K pull-down
Default: 8mA driving
Shared with GIO13
External interrupt 2
Default: 75K pull-up
Default: 8mA driving
Shared with GIO14
External interrupt 3
Default: 75K pull-up
Default: 8mA driving
Shared with GIO15
MediaTek Confidential
© 2011 MediaTek Inc.
This document contains information that is proprietary to MediaTek Inc.
Unauthorized reproduction or disclosure of this information in whole or in part is strictly prohibited.
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