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PDF TSL1412S Data sheet ( Hoja de datos )

Número de pieza TSL1412S
Descripción 1536 x 1 LINEAR SENSOR ARRAY
Fabricantes TAOS 
Logotipo TAOS Logotipo



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r TSL1412S
1536 × 1 LINEAR SENSOR ARRAY WITH HOLD
r TAOS045F APRIL 2007
D 1536 × 1 Sensor-Element Organization
D 400 Dot-Per-Inch (DPI) Sensor Pitch
D High Linearity and Uniformity
D Wide Dynamic Range . . . 4000:1 (72 dB)
D Output Referenced to Ground
D Low Image Lag . . . 0.5% Typ
D Operation to 8 MHz
D Single 3-V to 5-V Supply
D Rail-to-Rail Output Swing (AO)
D No External Load Resistor Required
Description
The TSL1412S linear sensor array consists of 2
sections of 768 photodiodes, each with
associated charge amplifier circuitry, aligned to
form a contiguous 1536 × 1 pixel array. The device
incorporates a pixel data-hold function that
provides simultaneous-integration start and stop
times for all pixels. The pixels measure 63.5 μm by
55.5 μm with 63.5-μm center-to-center spacing
and 8-μm spacing between pixels. Operation is
simplified by internal logic that requires only a
serial-input (SI) pulse and a clock.
(TOP VIEW)
1 VPP
2 SI1
3 HOLD1
4 CLK1
5 GND
6 AO1
7 SO1
8 SI2
9 HOLD2
10 CLK2
11 SO2
12 AO2
13 VDD
The device is intended for use in a wide variety of applications including mark and code reading, OCR and
contact imaging, edge detection and positioning, and optical encoding.
Functional Block Diagram (each section)
Pixel 1
(769)
1 Integrator
S1 2 Reset
2
_1
+ S2
Sample/Hold/
Output
3
Pixel
2
(770)
Pixel
3
(771)
3, 9
Hold
Hold
Switch Control Logic
Q1 Q2
Q3
Pixel
768
(1536)
Analog
Bus
Output
Buffer
Q768 (Q1536)
Gain
Trim
13 VDD
6, 12 AO
5 GND
7, 11
SO
4, 10
CLK
SI 2, 8
768-Bit Shift Register (2 each)
The
LUMENOLOGY
r
Company
Texas
Advarnced
Optoelectronic
Solutions
Inc.
1001 Klein Road S Suite 300 S Plano, TX 75074 S (972r) 673-0759
www.taosinc.com
Copyright E 2007, TAOS Inc.
1

1 page




TSL1412S pdf
TSL1412S
1536 × 1 LINEAR SENSOR ARRAY WITH HOLD
TAOS045F APRIL 2007
Dynamic Characteristics over recommended ranges of supply voltage and operating free-air
temperature (see Figures 7 and 8)
ts
tpd(SO)
PARAMETER
Analog output settling time to ± 1%
Propagation delay time, SO1, SO2
TEST CONDITIONS
RL = 330 Ω, CL = 50 pF
MIN TYP MAX UNIT
120 ns
50 ns
TYPICAL CHARACTERISTICS
CLK
SI1 tqt
Internal
Reset
18 Clock Cycles
tint
Integration
Not Integrating
Integrating
AO Hi-ÏÏÏZ ÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏ153ÏÏÏ7ClÏÏÏockÏÏÏCycÏÏÏles ÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏHi-ÏÏÏZ ÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏ
Figure 1. Timing Waveforms (serial connection)
CLK
tw
tsu(SI)
SI
SO
1
50%
th(SI)
2 768
tpd(SO)
769
tpd(SO)
ts
AO Pixel 1
Pixel 768
Figure 2. Operational Waveforms (Each Section)
2.5 V
5V
0V
5V
0V
The LUMENOLOGY r Company
r
www.taosinc.com
r
Copyright E 2007, TAOS Inc.
5

5 Page





TSL1412S arduino
TSL1412S
1536 × 1 LINEAR SENSOR ARRAY WITH HOLD
MECHANICAL INFORMATION
TAOS045F APRIL 2007
55.50
THEORETICAL PIXEL LAYOUT FOR IDEAL CONTINUOUS DIE
8.00
N2 N1
N
1
2
3
ACTUAL MULTI-DIE PIXEL LAYOUT FOR DIE-TO-DIE EDGE JOINING
64.00
Note B
N2 N1 N
12
46.00
37.00
25.50
13.00
Note C
11.00
14.50
154.50
NOTES: A. All linear dimensions are in micrometers.
B. Spacing between outside pixels of adjacent die is typical.
C. Die-to-die spacing.
D. This drawing is subject to change without notice.
Figure 11. Edge Pixel Layout Dimensions
3
The LUMENOLOGY r Company
r
www.taosinc.com
r
Copyright E 2007, TAOS Inc.
11

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