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PDF T460HW04-V8-02 Data sheet ( Hoja de datos )
| Número de pieza | T460HW04-V8-02 | |
| Descripción | TFT LCD MODULE | |
| Fabricantes | AUO | |
| Logotipo |  |
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T460HW04 V8/02 Product Specification
Rev.0 0
Model Name: T460HW04 V8/02
Issue Date : 2011/04/22
( )Preliminary Specifications
(Ϡ)Final Specifications
© Copyright AUO Optronics Corp. 2009 All Rights Reserved.
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44
2. Absolute Maximum Ratings
T460HW04 V8/02 Product Specification
Rev.0 0
The followings are maximum values which, if exceeded, may cause faulty operation or damage to the unit
Item
Logic/LCD Drive Voltage
Input Voltage of Signal
Operating Temperature
Operating Humidity
Storage Temperature
Storage Humidity
Panel Surface Temperature
Symbol
Vcc
Vin
TOP
HOP
TST
HST
PST
Min
-0.3
-0.3
0
10
-20
10
Max
14
4
+50
90
+60
90
65
Unit
[Volt]
[Volt]
[oC]
[%RH]
[oC]
[%RH]
[oC]
Conditions
Note 1
Note 1
Note 2
Note 2
Note 2
Note 2
Note 3
Note 1: Duration:50 msec.
кNote 2 : Maximum Wet-Bulb should be 39 and No condensation.
кThe relative humidity must not exceed 90% non-condensing at temperatures of 40 or less. At temperatures
к кgreater than 40 , the wet bulb temperature must not exceed 39 .
кNote 3: Surface temperature is measured at 50 Dry condition
Note 4: Storage period should refer to RA criteria
© Copyright AUO Optronics Corp. 2009 All Rights Reserved.
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1010
3.2 Interface Connections
T460HW04 V8/02 Product Specification
Rev.0 0
z LCD connector: FI-RE51S-HF (JAE, LVDS connector)
PIN Symbol
Description
PIN Symbol
Description
1 VDD
Power Supply, +12V DC
Regulated
26 CH2_0+
LVDS Channel 2, Signal 0+
2 VDD
Power Supply, +12V DC
Regulated
27 CH2_1-
LVDS Channel 2, Signal 1-
3 VDD
Power Supply, +12V DC
Regulated
28 CH2_1+
LVDS Channel 2, Signal 1+
4 VDD
Power Supply, +12V DC
Regulated
29 CH2_2-
LVDS Channel 2, Signal 2-
5 VDD
Power Supply, +12V DC
Regulated
30 CH2_2+
LVDS Channel 2, Signal 2+
6 NC
No connection
31 GND
Ground
7 GND
Ground
32 CH2_CLK-
LVDS Channel 2, Clock -
8 GND
Ground
33 CH2_CLK+
LVDS Channel 2, Clock +
9 GND
Ground
34 GND
Ground
10 CH1_0-
LVDS Channel 1, Signal 0- 35 CH2_3-
LVDS Channel 2, Signal 3-
11 CH1_0+ LVDS Channel 1, Signal 0+ 36 CH2_3+
LVDS Channel 2, Signal 3+
12 CH1_1-
LVDS Channel 1, Signal 1- 37 Reserved
AUO Internal Use Only
13 CH1_1+ LVDS Channel 1, Signal 1+ 38 Reserved
AUO Internal Use Only
14 CH1_2-
LVDS Channel 1, Signal 2- 39 GND
Ground
15 CH1_2+ LVDS Channel 1, Signal 2+ 40 SCL
EEPROM Serial Clock
16 GND
Ground
41 SDA
EEPROM Serial Data
17 CH1_CLK- LVDS Channel 1, Clock - 42 NC
No connection
18 CH1_CLK+ LVDS Channel 1, Clock + 43 WP
EEPROM Write Protection
High(3.3V) for Writable,
Low(GND) for Protection
19 GND
Ground
reserve 0603 footprint of resistor to
44 Panel_SEL
ground
20 CH1_3-
LVDS Channel 1, Signal 3- 45 LVDS_SEL
Open/High(3.3V) for NS,
Low(GND) for JEIDA
21 CH1_3+ LVDS Channel 1, Signal 3+ 46
NC
No connection
22 Reserved
AUO Internal Use Only
47 NC
No connection
23 Reserved
AUO Internal Use Only
48 NC
No connection
24 GND
Ground
49 NC
No connection
25 CH2_0-
LVDS Channel 2, Signal 0- 50
NC
No connection
51 Reserved
AUO Internal Use Only
Note: N.C. : please leave this pin unoccupied. It can not be connected by any signal (Low/GND/High).
© Copyright AUO Optronics Corp. 2009 All Rights Reserved.
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