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PDF CYRS1049DV33 Data sheet ( Hoja de datos )
| Número de pieza | CYRS1049DV33 | |
| Descripción | 4-Mbit (512 K x 8) Static RAM | |
| Fabricantes | Cypress Semiconductor | |
| Logotipo |  |
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CYRS1049DV33
4-Mbit (512 K × 8) Static RAM
with RadStop™ Technology
4-Mbit (512 K × 8) Static RAM with RadStop™ Technology
Radiation Performance
Radiation Data
❥ Total dose 300 Krad
❥ Soft error rate (both heavy ion and proton)
Heavy ions 1 × 10-10 upsets/bit-day with single-error
correction, double error detection error detection and
correction (SEC-DED EDAC)
❥ Neutron = 2.0 × 1014 N/cm2
❥ Dose rate > 2.0 × 109 (rad(Si)/s)
❥ Latch up immunity LET = 120 MeV.cm2/mg (125 C)
Processing Flows
❥ V grade - Class V flow in compliance with MIL-PRF 38535
Prototyping Options
❥ Non qualified manufacturers list (QML) V grade
CYPT1049DV33 devices with same functional and timing
characteristics in a 36-pin ceramic flat package
Features
❥ Temperature ranges
❥ Military/Space: –55 °C to 125 °C
❥ High speed
❥ tAA = 12 ns
❥ Low active power
❥ ICC = 95 mA at 12 ns (PMAX = 315 mW)
❥ Low CMOS standby power
❥ ISB2 = 15 mA
❥ 2.0 V data retention
❥ Automatic power-down when deselected
❥ Transistor-transistor logic (TTL) compatible inputs and outputs
❥ Easy memory expansion with CE and OE features
❥ Available in Pb-free 36-pin ceramic flat package
Logic Block Diagram
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
CE
WE
OE
INPUT BUFFER
512K x 8
ARRAY
COLUMN DECODER
POWER
DOWN
IIO/O00
IIO/O1 1
II/OO22
IIO/O3 3
IIO/O4 4
IIO/O5 5
IIO/O6 6
IIO/O7 7
Cypress Semiconductor Corporation • 198 Champion Court
Document Number: 001-64292 Rev. *C
• San Jose, CA 95134-1709 • 408-943-2600
Revised March 19, 2012
1 page  
CYRS1049DV33
Capacitance
Parameter [3]
Description
CIN
COUT
Input capacitance
I/O capacitance
Thermal Resistance
Parameter [3]
Description
JC Thermal resistance
(junction to case)
Test Conditions
TA = 25 C, f = 1 MHz, VCC = 3.3 V
Test Conditions
Test according to MIL-PRF 38538
AC Test Loads and Waveforms
Figure 2. AC Test Loads and Waveforms [4]
Max Unit
8 pF
8 pF
CeramicFlat
Package
Unit
3.6 C/W
Output
Z = 50
* Capacitive load consists
of all components of the
test environment
50
1.5 V
High-Z Characteristics
3.3 V
OUTPUT
5 pF
(a)
R 317
R2
351
(c)
3.0 V
30 pF* GND
All Input Pulses
90%
10%
90%
10%
Rise Time: 1 V/ns
(b)
Fall Time: 1 V/ns
Notes
3. Tested initially and after any design or process changes that may affect these parameters.
4. AC characteristics (except High Z) are tested using the load conditions shown in Figure 2 (a). High Z characteristics are tested for all speeds using the test load shown
in Figure 2 (c).
Document Number: 001-64292 Rev. *C
Page 5 of 16
5 Page 
CYRS1049DV33
Truth Table
CE OE
HX
LL
LX
LH
WE I/O0–I/O7
X High Z
H Data out
L Data in
H High Z
Mode
Power-down
Read
Write
Selected, Outputs disabled
Power
Standby (ISB1or ISB2)
Active (ICC)
Active (ICC)
Active (ICC)
Document Number: 001-64292 Rev. *C
Page 11 of 16
11 Page | ||
| Páginas | Total 16 Páginas | |
| PDF Descargar | [ Datasheet CYRS1049DV33.PDF ] | |
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