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PDF ALM-GN001 Data sheet ( Hoja de datos )

Número de pieza ALM-GN001
Descripción GNSS Filter-LNA Front-End Module
Fabricantes AVAGO 
Logotipo AVAGO Logotipo



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ALM-GN001
GNSS Filter-LNA Front-End Module
Data Sheet
Description
Avago Technologies’ ALM-GN001 is an ultra low-noise
GNSS front-end module that combines a low-noise
amplifier (LNA) with a GNSS FBAR pre-LNA filter. The LNA
uses Avago Technologies’proprietary GaAs Enhancement-
mode pHEMT process to achieve high gain with very low
noise figure and high linearity. Noise figure distribution
is very tightly controlled. A CMOS-compatible shutdown
pin is included either for turning the LNA on/off, or for
current adjustment. The integrated filter utilizes an Avago
Technologies’ leading-edge FBAR filter for exceptional
rejection at Cellular, DCS, PCS and WLAN band frequen-
cies. Bypass functionality with an external RF switch is
possible with separate RF switching.
The low noise figure and high gain, coupled with low
current consumption make it suitable for use in critical
low-power GNSS applications or during low-battery
situations.
Component Image
Surface Mount (2.3 x 1.7 x 0.85) mm3 6-lead DFN
Vdd (pin 1)
Vsd (pin 2)
RFin (pin 3)
VAGO
GXZZZ
TOP VIEW
RFOut (pin 6)
LNA_In (pin 5)
Filter_Out (pin 4)
RFOut (pin 6)
LNA_In (pin 5)
Filter_Out (pin 4)
Gnd
(pin 7)
BOTTOM VIEW
Vdd (pin 1)
Vsd (pin 2)
RFin (pin 3)
Package marking provides orientation and identification
A” = Avago special character
“G” = Product code
“X” = Month and year of manufacture
“ZZZ” = Last 3 digits of assembly lot identification
Attention: Observe precautions for
handling electrostatic sensitive devices.
ESD Machine Model = 70 V
ESD Human Body Model = 300 V
Refer to Avago Application Note A004R:
Electrostatic Discharge, Damage and Control.
Features
Operating Temperature Range -40 to +85°C
Very Low Noise Figure: 1.54dB typ.
Exceptional Cell/DCS/PCS/WLAN-Band rejection
Advanced GaAs E-pHEMT & FBAR Technology
Shutdown current : < 1mA
CMOS compatible shutdown pin (Vsd)
ESD : > 1kV at RFin pin
0.85mm typical thickness
Adjustable bias current via single control voltage pin
Small package dimension: ( 2.3 x 1.7 x 0.85 ) mm3
Meets MSL3, Lead-free and halogen free
Target Specifications (Typical performance @ 25° C)
At 1.575GHz, Vdd = 2.7V, Idd = 6mA
Gain = 16dB
NF = 1.54dB
IIP3 = 2.5dBm, IP1dB = -4dBm
S11 = -8dB, S22 =-13dB
Rejection @ 824 – 849MHz: 58dBc
Rejection @ 880 – 924MHz: 56dBc
Rejection @ 1710 – 1785MHz: 47dBc
Rejection @ 1850 – 1910MHz: 51dBc
Rejection @ 2400 – 2570MHz: 51dBc
Application
GNSS Front-end Module
Application Circuit
+Vdd = 2.7 V L2 1
C1 C3
2
Vsd
3
RFin
L4
ALM-GN001
6
RFout
5
LNA_In
L3
4
Filter_Out

1 page




ALM-GN001 pdf
+Vdd = 2.7 V
C1
R1
L1
L2 1
C3
C4 R2
L4
2
Vsd
3
RFin
Figure 2. Application Circuit
ALM-GN001
6
RFout
5
LNA_In
4
Filter_Out
L3
Notes:
1. RF input match is achieved by a single shunt inductor, L4. It is used to match the module for best NF and S11.
2. The output of the module is matched.
3. Best noise performance is obtained using high-Q wirewound inductors. Low noise figures are also obtainable with standard 0402 chip inductors.
4. C1 is for low frequency stability and C3 is the bypass capacitor for RF matching and linearity.
5. Bias control is achieved by either varying the Vsd voltage with R2, or fixing the Vsd voltage to Vdd and adjusting R2 for the desired current. The
component values specified in Table 1 results in 6 mA current drain. Noise figure, Gain and linearity can be further improved by increasing the bias
current.
6. L1 and R1 isolates the demoboard from external disturbances during measurement. They are not needed in actual application. Likewise, C4
mitigate the effect of external noise pickup on the Vsd line. This component is not required in actual operation.
7. L3 matches the filter output to the input of the LNA for optimum noise performance.
5

5 Page





ALM-GN001 arduino
18
17
16
15
14
13
12
11
10 3
4
56
Idd (mA)
Figure 20. [email protected] vs. Idd
25 °C
- 40 °C
85 °C
7
8
18
17
16
25 °C
- 40 °C
15 85 °C
14
13
12
11
10 3 4 5 6
Idd (mA)
Figure 21. [email protected] vs. Idd
78
-50
-52 25 °C
- 40 °C
-54 85 °C
-56
-58
-60 3 4 5 Idd (mA) 6 7
Figure 22. Rejection at 924MHz relative to 1.575GHz vs. Idd
8
-46
25 °C
- 40 °C
-48 85 °C
-50
-52
3 4 5 Idd (mA) 6 7
Figure 23. Rejection at 1710MHz relative to 1.575GHz vs. Idd
8
-50
-52
-54
-56
25 °C
-58 - 40 °C
85 °C
-60
34 56
Idd (mA)
7
Figure 24. Rejection at 1850MHz relative to 1.575GHz vs. Idd
8
-50
-52
-54
-56
25 °C
-58 - 40 °C
85 °C
-603 4 5 6
Idd (mA)
7
Figure 25. Rejection at 2400MHz relative to 1.575GHz vs. Idd
8
11

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