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PDF CPC7695 Data sheet ( Hoja de datos )
| Número de pieza | CPC7695 | |
| Descripción | Line Card Access Switch | |
| Fabricantes | Clare | |
| Logotipo |  |
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CPC7695
Line Card Access Switch
Features
• Improved switch dV/dt immunity of 1500 V/μs
• Drop-In Replacement for CPC7595
• Replaces CPC7585, and allows removal of
power-up control discrete components
• Enhanced SW8, Ringing Test Switch, breakdown
voltage
• TTL logic level inputs for 3.3V logic interfaces
• Smart logic for power up / hot plug state control
• Small 20 pin or 28 pin SOIC Package
• Monolithic IC reliability
• Low, matched, RON
• Eliminates the need for zero-cross switching
• Flexible switch timing for transition from ringing
mode to talk mode.
• Clean, bounce-free switching
• SLIC tertiary protection via integrated current
limiting, voltage clamping and thermal shutdown
• 5 V operation with power consumption < 10.5 mW
• Intelligent battery monitor
Applications
• Standard voice linecards
• Integrated Voice and Data (IVD) linecards
• Central office (CO)
• Digital Loop Carrier (DLC)
• PBX Systems
• Digitally Added Main Line (DAML)
• Fiber in the Loop (FITL)
• Pair Gain System
• Channel Banks
Description
The CPC7695 is a member of Clare’s third-generation
Line Card Access Switch (LCAS) family. This
monolithic 10-pole line card access switch is available
in a 20- or 28-pin SOIC package. It provides the
necessary functions to replace three 2-Form-C
electromechanical relays on analog line cards or
combined voice and data line cards found in central
office, access, and PBX equipment. The device
contains solid state switches for tip and ring line break,
ringing injection and test access. The CPC7695
requires only a +5 V supply and provides stable start
up conditioning during system power up and for hot
plug insertion. Once active, the inputs respond to
traditional TTL logic levels enabling the CPC7695 to
be used with 3.3V only logic.
Ordering Information
CPC7695 part numbers are specified as shown here:
B - 28-pin SOIC delivered 29/Tube, 1000/Reel
Z - 20-pin SOIC delivered 40/Tube, 1000/Reel
CPC7695 x x xx
TR - Add for Tape & Reel Version
A - With Protection SCR
B - Without Protection SCR
C - With Protection SCR and “Monitor Test State”
Pb
RoHS
2002/95/EC
e3
T (T )TESTin
CHANTEST
Tip
Ring
T (T )TESTout
DROPTEST
T 7LINE
Secondary
Protection
RLINE 22
10 8 TRINGING
SW7
X
X SW5 X SW3
X
SW1
5
X SW9
SW2
X
X SW6 XSW4
X SW10
X
SW8
CPC7695
SCR
Trip
Circuit
+5 Vdc
12 VDD
6 TBAT
SLIC
23 RBAT
17
VREF
Switch
Control
L
A
T
16
15
Logic
C
H
18
INTESTin
INRINGING
INTESTout
LATCH
R (R )TESTout
DROPTEST
R (R )TESTin
CHANTEST
19
20 RRINGING
24
300Ω (min.)
1
FGND
28
VBAT
14 13
DGND
TSD
VBAT
RINGING
NOTE 1: Pin assignments are for the 28 pin package.
NOTE 2: Block diagram shown with the optional protection SCR.
DS-CPC7695 - R00D
PRELIMINARY
1
1 page  
1.6 Switch Specifications
1.6.1 Break Switches, SW1 and SW2
Parameter
Off-State
Leakage Current
On Resistance
On Resistance
Matching
DC current limit
Dynamic current limit
(t ≤ 0.5 μs)
Logic input to switch
output isolation
Transient Immunity
Test Conditions
VSW1 (differential) = TLINE to TBAT
VSW2 (differential) = RLINE to RBAT
All-Off state.
+25° C,
VSW (differential) = -320 V to gnd
VSW (differential) = +260 V to -60 V
+85° C,
VSW (differential) = -330 V to gnd
VSW (differential) = +270 V to -60 V
-40° C,
VSW (differential) = -310 V to gnd
VSW (differential) = +250 V to -60 V
ISW(on) = ±10 mA, ±40 mA,
RBAT and TBAT = -2 V
+25° C
+85° C
-40° C
Per SW1 & SW2 On Resistance test
conditions.
VSW (on) = ±10 V
+25° C
+85° C
-40° C
Break switches on, all other switches
off. Apply ±1 kV 10x1000 μs pulse with
appropriate protection in place.
Logic inputs = GND
+25° C, VSW (TLINE, RLINE) = ±320 V
+85° C, VSW (TLINE, RLINE) = ±330 V
-40° C, VSW (TLINE, RLINE) = ±310 V
100VPP Square Wave, 100Hz
(Not production tested - limits are
guaranteed by design and quality
control sampling audits.)
Symbol
ISW
RON
ΔRON
ISW
ISW
ISW
dV/dt
Minimum
-
-
-
-
80
-
-
-
-
-
1500
Typical
0.1
0.3
0.1
14.5
20.5
10.5
0.15
225
150
400
2.5
0.1
0.3
0.1
2100
CPC7695
Maximum
Unit
1 μA
-
28 Ω
-
0.55 Ω
-
mA
425
-A
1 μA
- V/μs
R00D
PRELIMINARY
5
5 Page 
1.6.7 TESTin Switches, SW9 and SW10
Parameter
Off-state leakage
current
On Resistance
DC current limit
Logic input to switch
output isolation
Transient Immunity
Test Conditions
VSW9 (differential) = TTESTin to TBAT
VSW10 (differential) = RTESTin to RBAT
All-Off state.
+25° C,
VSW (differential) = -320 V to gnd
VSW (differential) = +260 V to -60 V
+85° C,
VSW (differential) = -330 V to gnd
VSW (differential) =+270 V to -60 V
-40° C,
VSW (differential) = -310 V to gnd
VSW (differential) = +250 V to -60 V
ISW (on) = ±10 mA, ±40 mA
+25° C
+85° C
-40° C
VSW (on) = ±10 V
+25° C
+85° C
-40° C
Logic inputs = GND
+25°C, VSW(TTESTin, RTESTin) = ±320 V
+85°C, VSW(TTESTin, RTESTin) = ±330 V
-40°C, VSW (TTESTin, RTESTin) = ±310 V
100VPP Square Wave, 100Hz
(Not production tested - limits are
guaranteed by design and quality
control sampling audits.)
Symbol
ISW
RON
ISW
ISW
dV/dt
Minimum
-
-
-
80
-
-
1500
Typical
0.1
0.3
0.1
35
50
26
160
110
210
0.1
0.3
0.1
2100
CPC7695
Maximum
Unit
1 μA
-
70 Ω
-
-
- mA
250
1 μA
- V/μs
R00D
PRELIMINARY
11
11 Page | ||
| Páginas | Total 23 Páginas | |
| PDF Descargar | [ Datasheet CPC7695.PDF ] | |
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