|
|
PDF AS4C4M16S-6TE Data sheet ( Hoja de datos )
| Número de pieza | AS4C4M16S-6TE | |
| Descripción | 64Mb / 4M x 16 bit Synchronous DRAM | |
| Fabricantes | Alliance Semiconductor | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de AS4C4M16S-6TE (archivo pdf) en la parte inferior de esta página. Total 70 Páginas | ||
|
No Preview Available !
AS4C4M16S
4M X 16 CMOS Synchronous Dynamic RAM
Jan 2007 (Rev.3.4)
Description
The AS4C4M16S are high-speed 67,108,864-bit synchronous dynamic random-access memories, organized as
1,048,576 x 16 x 4 (word x bit x bank), respectively.
The synchronous DRAMs achieved high-speed data transfer using the pipeline architecture and clock frequency up
to 166MHz. All input and outputs are synchronized with the positive edge of the clock. The synchronous DRAMs are
compatible with Low Voltage TTL (LVTTL).These products are packaged in 54-pin TSOPII.
Features
• Single 3.3V (±0.3V) power supply
• High speed clock cycle time -6ns:166MHz<3-3-3>
• Fully synchronous operation referenced to clock rising edge
• Possible to assert random column access in every cycle
• Quad internal banks controlled by BA0 & BA1 (Bank Select)
• Byte control by LDQM and UDQM
• Programmable Wrap sequence (Sequential / Interleave)
• Programmable burst length (1, 2, 4, 8 and full page)
• Programmable /CAS latency (2 and 3)
• Automatic precharge and controlled precharge
• CBR (Auto) refresh and self refresh
• X16 organization
• LVTTL compatible inputs and outputs
• 4,096 refresh cycles / 64ms
• Burst termination by Burst stop and Precharge command
Options
• Operating temperature range
Marking
- Extended (-25°C to 85°C)
E
Alliance Memory,Inc.
Web : www.alliancememory.com Email : [email protected]
TEL : 650-610-6800 Fax : 650-620-9211
-1-
1 page  
AS4C4M16S
4M X 16 CMOS Synchronous Dynamic RAM
Jan 2007 (Rev.3.4)
Absolute Maximum Ratings
Parameter
Symbol
Conditions
Value
Unit
Supply Voltage
VDD
with respect to VSS
-0.5 to 4.6
V
Supply Voltage for Output
VDDQ
with respect to VSSQ
-0.5 to 4.6
V
Input Voltage
VI with respect to VSS
-0.5 to VDD+0.5
V
Output Voltage
VO with respect to VSSQ
-0.5 to VDDQ+0.5
V
Short circuit output current
IO
50 mA
Power dissipation
PD Ta = 25 °C
1W
Operating temperature
TOPT
by temperature options
Ta °C
Storage temperature
TSTG
-65 to 150
°C
Caution Exposing the device to stress above those listed in Absolute Maximum Ratings could cause permanent damage. The device is not meant to be
operated under conditions outside the limits described in the operational section of this specification. Exposure to Absolute Maximum Rating conditions for
extended periods may affect device reliability.
Recommended Operating Conditions (Ta: noted by temperature options)
Parameter
Symbol
Limits
Min. Typ.
Supply Voltage
VDD
3.0
3.3
Supply Voltage for DQ
VDDQ
3.0
3.3
Ground
VSS
0
0
Ground for DQ
VSSQ
0
0
High Level Input Voltage (all inputs)
VIH 2.0
Low Level Input Voltage (all inputs)
VIL -0.3
Note :
1.All voltages are referenced to Vss = 0V.
2.VIH (max) is acceptable 5.6V AC pulse width with ≤ 3ns of duration.
3.VIL (min) is acceptable -2.0V AC pulse width with ≤ 3ns of duration.
Max.
3.6
3.6
0
0
VDD + 0.3
0.8
Unit
V
V
V
V
V
V
Pin Capacitance(VDD = VDDQ = 3.3±0.3V , VSS = VSSQ = 0V, unless otherwise noted)
Parameter
Symbol
Min Max
Input Capacitance, address & control pin
CIN 2.5 3.8
Input Capacitance, CLK pin
CCLK
2.5 3.5
Data input / output capacitance
CI/O
4.0 6.5
Unit
pF
pF
pF
Alliance Memory,Inc.
Web : www.alliancememory.com Email : [email protected]
TEL : 650-610-6800 Fax : 650-620-9211
-5-
5 Page 
AS4C4M16S
4M X 16 CMOS Synchronous Dynamic RAM
Jan 2007 (Rev.3.4)
2.4 Operative Command Table (note 1)
Current state
Idle
Row active
Read
write
CS RAS CAS WE
Address
Command
Action
Notes
H X X XX
DESL
Nop or Power down
2
L H H XX
NOP or BST Nop or Power down
2
L H L H BA, CA, A10 READ/READA ILLEGAL
3
L H L L BA, CA, A10 WRIT/WRITA ILLEGAL
3
L L H H BR, RA
ACT
Row active
L L H L BA, A10
PRE/PALL
Nop
LL
L HX
REF/SELF
Refresh or Self refresh
4
L L L L Op-Code
MPS
Mode register access
H X X XX
DESL
Nop
L H H XX
NOP or BST Nop
L H L H BA, CA, A10 READ/READA Begin read : Determine AP
5
L H L L BA, CA, A10 WRIT/WRITA Begin write : Determine AP
5
L L H H BA, RA
ACT
ILLEGAL
3
L L H L BA, A10
PRE/PALL
Precharge
6
LL
L HX
REF/SELF
ILLEGAL
L L L L Op-Code
MRS
ILLEGAL
H X X XX
DESL
Continue burst to end→Row active
L H H HX
NOP
Continue burst to end→Row active
L H H LX
BST Burst stop→Row active
L H L H BA, CA, A10 READ/READA Term burst, new read : Determine
AP
7
L H L L BA, CA, A10 WRIT/WRITA Term burst, start write : Determine 7,8
AP
L L H H BA, RA
ACT
ILLEGAL
3
L L H L BA, A10
PRE/PALL
Term burst, precharging
LL
L HX
REF/SELF
ILLEGAL
L L L L Op-Code
MRS
ILLEGAL
H X X XX
DESL
Continue burst to end→write
recovering
L H H HX
NOP
Continue burst to end→write
recovering
L H H LX
BST Burst stop→Row active
L H L H BA, CA, A10 READ/READA Term burst, start read : Determine
AP
7,8
L H L L BA, CA, A10 WRIT/WRITA Term burst, new write : Determine
AP
7
L L H H BA, RA
ACT
ILLEGAL
3
L L H L BA, A10
PRE/PALL
Term burst, precharging
9
LL
L HX
REF/SELF
ILLEGAL
L L L L Op-Code
MRS
ILLEGAL
Alliance Memory,Inc.
Web : www.alliancememory.com Email : [email protected]
TEL : 650-610-6800 Fax : 650-620-9211
- 11 -
11 Page | ||
| Páginas | Total 70 Páginas | |
| PDF Descargar | [ Datasheet AS4C4M16S-6TE.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| AS4C4M16S-6TCN | 64Mb / 4M x 16 bit Synchronous DRAM | Alliance Semiconductor |
| AS4C4M16S-6TE | 64Mb / 4M x 16 bit Synchronous DRAM | Alliance Semiconductor |
| AS4C4M16S-6TIN | 64Mb / 4M x 16 bit Synchronous DRAM | Alliance Semiconductor |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |