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Número de pieza | TM084SDHG01 | |
Descripción | Display Module | |
Fabricantes | Tianma | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de TM084SDHG01 (archivo pdf) en la parte inferior de esta página. Total 21 Páginas | ||
No Preview Available ! SHANGHAI TIANMA MICRO-ELECTRONICS
TM084SDHG01 V1.0
MODEL NO. :
ISSUED DATE:
VERSION :
TM084SDHG01
2012-05-23
Ver 1.0
■Preliminary Specification
□Final Product Specification
Customer :
Approved by
Notes
SHANGHAI TIANMA Confirmed :
Prepared by
Checked by
Longping.Deng
Ling.Shen
Approved by
Ruiyuan.Zhou
This technical specification is subjected to change without notice
The information contained herein is the exclusive property of SHANGHAI AVIC OPTOELECTRONICS
Corporation, and shall not be distributed, reproduced, or disclosed in whole or in part without prior written
permission of SHANGHAI AVIC OPTOELECTRONICS Corporation.
Page 1 of 21
1 page SHANGHAI TIANMA MICRO-ELECTRONICS
TM084SDHG01 V1.0
2 Input/Output Terminals
2.1 CN1 of FPC
Connector type: 107A20-0021RA-G3-R (Hirose)
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
Symbol
VDD
VDD
UD
LR
RxIN1-
RxIN1+
GND
RxIN2-
RxIN2+
GND
RxIN3-
RxIN3+
GND
RxCLKIN-
RxCLKIN+
GND
SEL68
NC
RxIN4-
RxIN4+
I/O Description
P Power supply
P Power supply
I Vertical Reverse Scan Control
I Horizontal Reverse Scan Control
I Negative data 1 for LVDS signal input
I Positive data 1 for LVDS signal input
P Ground
I Negative data 2 for LVDS signal input
I Positive data 2 for LVDS signal input
P Ground
I Negative data 3 for LVDS signal input
I Positive data 3 for LVDS signal input
P Ground
I negative clock for LVDS signal input
I Positive clock for LVDS signal input
P Ground
I LVDS 6/8 bit selection control
I No connection
I Negative data 4 for LVDS signal input
I Positive data 4 for LVDS signal input
Remark
I---Input, O---Output, P--- Power/Ground
Table 2.1 terminal pin assignments
The information contained herein is the exclusive property of SHANGHAI AVIC OPTOELECTRONICS
Corporation, and shall not be distributed, reproduced, or disclosed in whole or in part without prior written
permission of SHANGHAI AVIC OPTOELECTRONICS Corporation.
Page 5 of 21
5 Page SHANGHAI TIANMA MICRO-ELECTRONICS
5 Timing Chart
5.1 TFT-LCD Input Timing
Parameter
DCLK
HSYNC
VSYNC
Symbol
Fclk
Tclk
TH
THD
Thwh
Thbp
Thfp
TV
TVD
Tvwh
Tvbp
Tvfp
Min
34.5
16
900
-
1
-
12
640
-
1
-
1
Typ
39.6
25.3
1000
800
-
88
112
660
480
-
39
21
TM084SDHG01 V1.0
VCC=3.3V, GND=0V, Ta=25℃
Max Unit Remark
50.4
MHz Tclk=1/Fclk
30.7 ns
1200
Tclk
- Tclk
40 Tclk
- Tclk
312 Tclk
700 TH
- TH
20 TH
- TH
61 TH
Table 5.1 TCON input timing(HV mode)
5.2 Recommended Timing Setting Of TCON
TCON (Embedded In Source IC) Input timing at DE mode
VCC=3.3V, GND=0V, Ta=25℃
Parameter
Symb
ol
Min.
Typ. Max.
Dclk frequency
Fclk 32.6 39.6 62.4
Horizontal total
TH 890 1000 1300
Horizontal
section
Horizontal blanking
THC
90
200 500
Valid Data Width
THD
-
800 -
Frame rate
- - 60 -
Vertical
section
Vertical total
Vertical blanking
TV 610 660 800
TVC
10
60 200
Valid Data Width
TVD - 600 -
Table 5.2 TCON input timing (DE mode)
Unit Remark
MHz
Tclk
Tclk
Tclk
Hz
TH
TH
TH
Tclk=1/Fclk
The information contained herein is the exclusive property of SHANGHAI AVIC OPTOELECTRONICS
Corporation, and shall not be distributed, reproduced, or disclosed in whole or in part without prior written
permission of SHANGHAI AVIC OPTOELECTRONICS Corporation.
Page 11 of 21
11 Page |
Páginas | Total 21 Páginas | |
PDF Descargar | [ Datasheet TM084SDHG01.PDF ] |
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